#define ACM_TIMEOUT 1*HZ
#define DISABLE_3D_POWERGATING
+#define DISABLE_MPE_POWERGATING
void nvhost_module_busy(struct nvhost_module *mod)
{
}
#endif
+#ifdef DISABLE_MPE_POWERGATING
+ /*
+ * Disable power gating for MPE as it seems to cause issues with
+ * camera record stress tests when run in loop.
+ */
+ if (mod->powergate_id == TEGRA_POWERGATE_MPE) {
+ tegra_powergate_sequence_power_up(mod->powergate_id,
+ mod->clk[0]);
+ clk_disable(mod->clk[0]);
+ mod->powergate_id = -1;
+ }
+#endif
+
mutex_init(&mod->lock);
init_waitqueue_head(&mod->idle);
INIT_DELAYED_WORK(&mod->powerdown, powerdown_handler);