Add assertion for scale verification.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12120 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrBuilder.h b/lib/Target/X86/X86InstrBuilder.h
index a981db069ebe015f60c4330886609cc32a298553..6612cd3e674c228ab2cbc6a42e83ceb393ed0f6f 100644 (file)
--- a/lib/Target/X86/X86InstrBuilder.h
+++ b/lib/Target/X86/X86InstrBuilder.h
@@ -54,6 +54,7 @@ inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB,
                                                  unsigned Scale,
                                                  unsigned IndexReg,
                                                  unsigned Disp) {
+  assert (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8);
   return MIB.addReg(BaseReg).addZImm(Scale).addReg(IndexReg).addSImm(Disp);
 }