has exactly one MachineMemOperand, and change some X86 lowering code to
make use of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53498
91177308-0d34-0410-b5e6-
96231b3b80d8
{ return MemOperands.end(); }
bool memoperands_empty() const { return MemOperands.empty(); }
+ /// hasOneMemOperand - Return true if this instruction has exactly one
+ /// MachineMemOperand.
+ bool hasOneMemOperand() const {
+ return !memoperands_empty() &&
+ next(memoperands_begin()) == memoperands_end();
+ }
+
/// isIdenticalTo - Return true if this instruction is identical to (same
/// opcode and same operands as) the specified instruction.
bool isIdenticalTo(const MachineInstr *Other) const {
// Check switch flag
if (NoFusing) return NULL;
+ // Determine the alignment of the load.
unsigned Alignment = 0;
- for (alist<MachineMemOperand>::iterator i = LoadMI->memoperands_begin(),
- e = LoadMI->memoperands_end(); i != e; ++i) {
- const MachineMemOperand &MRO = *i;
- unsigned Align = MRO.getAlignment();
- if (Align > Alignment)
- Alignment = Align;
- }
+ if (LoadMI->hasOneMemOperand())
+ Alignment = LoadMI->memoperands_begin()->getAlignment();
// FIXME: Move alignment requirement into tables?
if (Alignment < 16) {