Merge tag 'omap-cleanup-a-for-3.10' of git://git.kernel.org/pub/scm/linux/kernel...

In the OMAP2+ clock data, replace the flags that determine whether a
clock should be registered on a given SoC with per-SoC lists.

Basic build, boot, and power management test results are available at:

http://www.pwsan.com/omap/testlogs/jk_clock_flags_cleanup_3.10/20130318100504/

diff --git a/arch/arm/mach-omap1/dma.h b/arch/arm/mach-omap1/dma.h
index da6345dab03f94a9b8e652a43738bf17b81a5fd0..d05909c967152223c0a6390c886c74c60ede3e61 100644 (file)
--- a/arch/arm/mach-omap1/dma.h
+++ b/arch/arm/mach-omap1/dma.h
@@ -21,21 +21,10 @@
 
 /* DMA channels for omap1 */
 #define OMAP_DMA_NO_DEVICE             0
-#define OMAP_DMA_MCSI1_TX              1
-#define OMAP_DMA_MCSI1_RX              2
-#define OMAP_DMA_I2C_RX                        3
-#define OMAP_DMA_I2C_TX                        4
-#define OMAP_DMA_EXT_NDMA_REQ          5
-#define OMAP_DMA_EXT_NDMA_REQ2         6
-#define OMAP_DMA_UWIRE_TX              7
 #define OMAP_DMA_MCBSP1_TX             8
 #define OMAP_DMA_MCBSP1_RX             9
 #define OMAP_DMA_MCBSP3_TX             10
 #define OMAP_DMA_MCBSP3_RX             11
-#define OMAP_DMA_UART1_TX              12
-#define OMAP_DMA_UART1_RX              13
-#define OMAP_DMA_UART2_TX              14
-#define OMAP_DMA_UART2_RX              15
 #define OMAP_DMA_MCBSP2_TX             16
 #define OMAP_DMA_MCBSP2_RX             17
 #define OMAP_DMA_UART3_TX              18
@@ -43,41 +32,11 @@
 #define OMAP_DMA_CAMERA_IF_RX          20
 #define OMAP_DMA_MMC_TX                        21
 #define OMAP_DMA_MMC_RX                        22
-#define OMAP_DMA_NAND                  23
-#define OMAP_DMA_IRQ_LCD_LINE          24
-#define OMAP_DMA_MEMORY_STICK          25
 #define OMAP_DMA_USB_W2FC_RX0          26
-#define OMAP_DMA_USB_W2FC_RX1          27
-#define OMAP_DMA_USB_W2FC_RX2          28
 #define OMAP_DMA_USB_W2FC_TX0          29
-#define OMAP_DMA_USB_W2FC_TX1          30
-#define OMAP_DMA_USB_W2FC_TX2          31
 
 /* These are only for 1610 */
-#define OMAP_DMA_CRYPTO_DES_IN         32
-#define OMAP_DMA_SPI_TX                        33
-#define OMAP_DMA_SPI_RX                        34
-#define OMAP_DMA_CRYPTO_HASH           35
-#define OMAP_DMA_CCP_ATTN              36
-#define OMAP_DMA_CCP_FIFO_NOT_EMPTY    37
-#define OMAP_DMA_CMT_APE_TX_CHAN_0     38
-#define OMAP_DMA_CMT_APE_RV_CHAN_0     39
-#define OMAP_DMA_CMT_APE_TX_CHAN_1     40
-#define OMAP_DMA_CMT_APE_RV_CHAN_1     41
-#define OMAP_DMA_CMT_APE_TX_CHAN_2     42
-#define OMAP_DMA_CMT_APE_RV_CHAN_2     43
-#define OMAP_DMA_CMT_APE_TX_CHAN_3     44
-#define OMAP_DMA_CMT_APE_RV_CHAN_3     45
-#define OMAP_DMA_CMT_APE_TX_CHAN_4     46
-#define OMAP_DMA_CMT_APE_RV_CHAN_4     47
-#define OMAP_DMA_CMT_APE_TX_CHAN_5     48
-#define OMAP_DMA_CMT_APE_RV_CHAN_5     49
-#define OMAP_DMA_CMT_APE_TX_CHAN_6     50
-#define OMAP_DMA_CMT_APE_RV_CHAN_6     51
-#define OMAP_DMA_CMT_APE_TX_CHAN_7     52
-#define OMAP_DMA_CMT_APE_RV_CHAN_7     53
 #define OMAP_DMA_MMC2_TX               54
 #define OMAP_DMA_MMC2_RX               55
-#define OMAP_DMA_CRYPTO_DES_OUT                56
 
 #endif /* __OMAP1_DMA_CHANNEL_H */

diff --git a/arch/arm/mach-omap2/dma.h b/arch/arm/mach-omap2/dma.h
index eba80dbc5218d8986e937e296aea7fb507af8c8c..65f80cacf1784976787e62e7712cea4b9b6c7961 100644 (file)
--- a/arch/arm/mach-omap2/dma.h
+++ b/arch/arm/mach-omap2/dma.h
@@ -22,69 +22,20 @@
 
 /* DMA channels for 24xx */
 #define OMAP24XX_DMA_NO_DEVICE         0
-#define OMAP24XX_DMA_XTI_DMA           1       /* S_DMA_0 */
 #define OMAP24XX_DMA_EXT_DMAREQ0       2       /* S_DMA_1 */
 #define OMAP24XX_DMA_EXT_DMAREQ1       3       /* S_DMA_2 */
 #define OMAP24XX_DMA_GPMC              4       /* S_DMA_3 */
-#define OMAP24XX_DMA_GFX               5       /* S_DMA_4 */
-#define OMAP24XX_DMA_DSS               6       /* S_DMA_5 */
-#define OMAP242X_DMA_VLYNQ_TX          7       /* S_DMA_6 */
-#define OMAP24XX_DMA_EXT_DMAREQ2       7       /* S_DMA_6 */
-#define OMAP24XX_DMA_CWT               8       /* S_DMA_7 */
 #define OMAP24XX_DMA_AES_TX            9       /* S_DMA_8 */
 #define OMAP24XX_DMA_AES_RX            10      /* S_DMA_9 */
-#define OMAP24XX_DMA_DES_TX            11      /* S_DMA_10 */
-#define OMAP24XX_DMA_DES_RX            12      /* S_DMA_11 */
-#define OMAP24XX_DMA_SHA1MD5_RX                13      /* S_DMA_12 */
-#define OMAP34XX_DMA_SHA2MD5_RX                13      /* S_DMA_12 */
 #define OMAP242X_DMA_EXT_DMAREQ2       14      /* S_DMA_13 */
 #define OMAP242X_DMA_EXT_DMAREQ3       15      /* S_DMA_14 */
 #define OMAP242X_DMA_EXT_DMAREQ4       16      /* S_DMA_15 */
-#define OMAP242X_DMA_EAC_AC_RD         17      /* S_DMA_16 */
-#define OMAP242X_DMA_EAC_AC_WR         18      /* S_DMA_17 */
-#define OMAP242X_DMA_EAC_MD_UL_RD      19      /* S_DMA_18 */
-#define OMAP242X_DMA_EAC_MD_UL_WR      20      /* S_DMA_19 */
-#define OMAP242X_DMA_EAC_MD_DL_RD      21      /* S_DMA_20 */
-#define OMAP242X_DMA_EAC_MD_DL_WR      22      /* S_DMA_21 */
-#define OMAP242X_DMA_EAC_BT_UL_RD      23      /* S_DMA_22 */
-#define OMAP242X_DMA_EAC_BT_UL_WR      24      /* S_DMA_23 */
-#define OMAP242X_DMA_EAC_BT_DL_RD      25      /* S_DMA_24 */
-#define OMAP242X_DMA_EAC_BT_DL_WR      26      /* S_DMA_25 */
-#define OMAP243X_DMA_EXT_DMAREQ3       14      /* S_DMA_13 */
-#define OMAP24XX_DMA_SPI3_TX0          15      /* S_DMA_14 */
-#define OMAP24XX_DMA_SPI3_RX0          16      /* S_DMA_15 */
-#define OMAP24XX_DMA_MCBSP3_TX         17      /* S_DMA_16 */
-#define OMAP24XX_DMA_MCBSP3_RX         18      /* S_DMA_17 */
-#define OMAP24XX_DMA_MCBSP4_TX         19      /* S_DMA_18 */
-#define OMAP24XX_DMA_MCBSP4_RX         20      /* S_DMA_19 */
-#define OMAP24XX_DMA_MCBSP5_TX         21      /* S_DMA_20 */
-#define OMAP24XX_DMA_MCBSP5_RX         22      /* S_DMA_21 */
-#define OMAP24XX_DMA_SPI3_TX1          23      /* S_DMA_22 */
-#define OMAP24XX_DMA_SPI3_RX1          24      /* S_DMA_23 */
-#define OMAP243X_DMA_EXT_DMAREQ4       25      /* S_DMA_24 */
-#define OMAP243X_DMA_EXT_DMAREQ5       26      /* S_DMA_25 */
 #define OMAP34XX_DMA_I2C3_TX           25      /* S_DMA_24 */
 #define OMAP34XX_DMA_I2C3_RX           26      /* S_DMA_25 */
 #define OMAP24XX_DMA_I2C1_TX           27      /* S_DMA_26 */
 #define OMAP24XX_DMA_I2C1_RX           28      /* S_DMA_27 */
 #define OMAP24XX_DMA_I2C2_TX           29      /* S_DMA_28 */
 #define OMAP24XX_DMA_I2C2_RX           30      /* S_DMA_29 */
-#define OMAP24XX_DMA_MCBSP1_TX         31      /* S_DMA_30 */
-#define OMAP24XX_DMA_MCBSP1_RX         32      /* S_DMA_31 */
-#define OMAP24XX_DMA_MCBSP2_TX         33      /* S_DMA_32 */
-#define OMAP24XX_DMA_MCBSP2_RX         34      /* S_DMA_33 */
-#define OMAP24XX_DMA_SPI1_TX0          35      /* S_DMA_34 */
-#define OMAP24XX_DMA_SPI1_RX0          36      /* S_DMA_35 */
-#define OMAP24XX_DMA_SPI1_TX1          37      /* S_DMA_36 */
-#define OMAP24XX_DMA_SPI1_RX1          38      /* S_DMA_37 */
-#define OMAP24XX_DMA_SPI1_TX2          39      /* S_DMA_38 */
-#define OMAP24XX_DMA_SPI1_RX2          40      /* S_DMA_39 */
-#define OMAP24XX_DMA_SPI1_TX3          41      /* S_DMA_40 */
-#define OMAP24XX_DMA_SPI1_RX3          42      /* S_DMA_41 */
-#define OMAP24XX_DMA_SPI2_TX0          43      /* S_DMA_42 */
-#define OMAP24XX_DMA_SPI2_RX0          44      /* S_DMA_43 */
-#define OMAP24XX_DMA_SPI2_TX1          45      /* S_DMA_44 */
-#define OMAP24XX_DMA_SPI2_RX1          46      /* S_DMA_45 */
 #define OMAP24XX_DMA_MMC2_TX           47      /* S_DMA_46 */
 #define OMAP24XX_DMA_MMC2_RX           48      /* S_DMA_47 */
 #define OMAP24XX_DMA_UART1_TX          49      /* S_DMA_48 */
@@ -93,33 +44,12 @@
 #define OMAP24XX_DMA_UART2_RX          52      /* S_DMA_51 */
 #define OMAP24XX_DMA_UART3_TX          53      /* S_DMA_52 */
 #define OMAP24XX_DMA_UART3_RX          54      /* S_DMA_53 */
-#define OMAP24XX_DMA_USB_W2FC_TX0      55      /* S_DMA_54 */
-#define OMAP24XX_DMA_USB_W2FC_RX0      56      /* S_DMA_55 */
-#define OMAP24XX_DMA_USB_W2FC_TX1      57      /* S_DMA_56 */
-#define OMAP24XX_DMA_USB_W2FC_RX1      58      /* S_DMA_57 */
-#define OMAP24XX_DMA_USB_W2FC_TX2      59      /* S_DMA_58 */
-#define OMAP24XX_DMA_USB_W2FC_RX2      60      /* S_DMA_59 */
 #define OMAP24XX_DMA_MMC1_TX           61      /* S_DMA_60 */
 #define OMAP24XX_DMA_MMC1_RX           62      /* S_DMA_61 */
-#define OMAP24XX_DMA_MS                        63      /* S_DMA_62 */
 #define OMAP242X_DMA_EXT_DMAREQ5       64      /* S_DMA_63 */
-#define OMAP243X_DMA_EXT_DMAREQ6       64      /* S_DMA_63 */
-#define OMAP34XX_DMA_EXT_DMAREQ3       64      /* S_DMA_63 */
 #define OMAP34XX_DMA_AES2_TX           65      /* S_DMA_64 */
 #define OMAP34XX_DMA_AES2_RX           66      /* S_DMA_65 */
-#define OMAP34XX_DMA_DES2_TX           67      /* S_DMA_66 */
-#define OMAP34XX_DMA_DES2_RX           68      /* S_DMA_67 */
 #define OMAP34XX_DMA_SHA1MD5_RX                69      /* S_DMA_68 */
-#define OMAP34XX_DMA_SPI4_TX0          70      /* S_DMA_69 */
-#define OMAP34XX_DMA_SPI4_RX0          71      /* S_DMA_70 */
-#define OMAP34XX_DSS_DMA0              72      /* S_DMA_71 */
-#define OMAP34XX_DSS_DMA1              73      /* S_DMA_72 */
-#define OMAP34XX_DSS_DMA2              74      /* S_DMA_73 */
-#define OMAP34XX_DSS_DMA3              75      /* S_DMA_74 */
-#define OMAP34XX_DMA_MMC3_TX           77      /* S_DMA_76 */
-#define OMAP34XX_DMA_MMC3_RX           78      /* S_DMA_77 */
-#define OMAP34XX_DMA_USIM_TX           79      /* S_DMA_78 */
-#define OMAP34XX_DMA_USIM_RX           80      /* S_DMA_79 */
 
 #define OMAP36XX_DMA_UART4_TX          81      /* S_DMA_80 */
 #define OMAP36XX_DMA_UART4_RX          82      /* S_DMA_81 */