--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+@.LC0 = internal global [10 x i8] c"argc: %d\0A\00" ; <[10 x i8]*> [#uses=1]
+
+declare i32 @puts(i8*)
+
+define void @getoptions(i32* %argc) {
+bb0:
+ ret void
+}
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main(i32 %argc, i8** %argv) {
+bb0:
+ call i32 (i8*, ...)* @printf( i8* getelementptr ([10 x i8]* @.LC0, i64 0, i64 0), i32 %argc ) ; <i32>:0 [#uses=0]
+ %cast224 = bitcast i8** %argv to i8* ; <i8*> [#uses=1]
+ %local = alloca i8* ; <i8**> [#uses=3]
+ store i8* %cast224, i8** %local
+ %cond226 = icmp sle i32 %argc, 0 ; <i1> [#uses=1]
+ br i1 %cond226, label %bb3, label %bb2
+bb2: ; preds = %bb2, %bb0
+ %cann-indvar = phi i32 [ 0, %bb0 ], [ %add1-indvar, %bb2 ] ; <i32> [#uses=2]
+ %add1-indvar = add i32 %cann-indvar, 1 ; <i32> [#uses=2]
+ %cann-indvar-idxcast = sext i32 %cann-indvar to i64 ; <i64> [#uses=1]
+ %CT = bitcast i8** %local to i8*** ; <i8***> [#uses=1]
+ %reg115 = load i8*** %CT ; <i8**> [#uses=1]
+ %cast235 = getelementptr i8** %reg115, i64 %cann-indvar-idxcast ; <i8**> [#uses=1]
+ %reg117 = load i8** %cast235 ; <i8*> [#uses=1]
+ %reg236 = call i32 @puts( i8* %reg117 ) ; <i32> [#uses=0]
+ %cond239 = icmp slt i32 %add1-indvar, %argc ; <i1> [#uses=1]
+ br i1 %cond239, label %bb2, label %bb3
+bb3: ; preds = %bb2, %bb0
+ %cast243 = bitcast i8** %local to i32* ; <i32*> [#uses=1]
+ call void @getoptions( i32* %cast243 )
+ ret i32 0
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @foo(i32 %X, i32 %Y, double %A) {
+ %cond212 = fcmp une double %A, 1.000000e+00 ; <i1> [#uses=1]
+ %cast110 = zext i1 %cond212 to i32 ; <i32> [#uses=1]
+ ret i32 %cast110
+}
+
+define i32 @main() {
+ %reg212 = call i32 @foo( i32 0, i32 1, double 1.000000e+00 ) ; <i32> [#uses=1]
+ ret i32 %reg212
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @main() {
+ call i32 @mylog( i32 4 ) ; <i32>:1 [#uses=0]
+ ret i32 0
+}
+
+define internal i32 @mylog(i32 %num) {
+bb0:
+ br label %bb2
+bb2: ; preds = %bb2, %bb0
+ %reg112 = phi i32 [ 10, %bb2 ], [ 1, %bb0 ] ; <i32> [#uses=1]
+ %cann-indvar = phi i32 [ %cann-indvar, %bb2 ], [ 0, %bb0 ] ; <i32> [#uses=1]
+ %reg114 = add i32 %reg112, 1 ; <i32> [#uses=2]
+ %cond222 = icmp slt i32 %reg114, %num ; <i1> [#uses=1]
+ br i1 %cond222, label %bb2, label %bb3
+bb3: ; preds = %bb2
+ ret i32 %reg114
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @main() {
+; <label>:0
+ br label %Loop
+Loop: ; preds = %Loop, %0
+ %X = phi i32 [ 0, %0 ], [ 1, %Loop ] ; <i32> [#uses=1]
+ br i1 true, label %Out, label %Loop
+Out: ; preds = %Loop
+ ret i32 %X
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+; We were accidentally inverting the signedness of right shifts. Whoops.
+
+define i32 @main() {
+ %X = ashr i32 -1, 16 ; <i32> [#uses=1]
+ %Y = ashr i32 %X, 16 ; <i32> [#uses=1]
+ %Z = add i32 %Y, 1 ; <i32> [#uses=1]
+ ret i32 %Z
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @main() {
+ %X = fadd double 0.000000e+00, 1.000000e+00 ; <double> [#uses=1]
+ %Y = fsub double 0.000000e+00, 1.000000e+00 ; <double> [#uses=2]
+ %Z = fcmp oeq double %X, %Y ; <i1> [#uses=0]
+ fadd double %Y, 0.000000e+00 ; <double>:1 [#uses=0]
+ ret i32 0
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @bar(i8* %X) {
+ ; pointer should be 4 byte aligned!
+ %P = alloca double ; <double*> [#uses=1]
+ %R = ptrtoint double* %P to i32 ; <i32> [#uses=1]
+ %A = and i32 %R, 3 ; <i32> [#uses=1]
+ ret i32 %A
+}
+
+define i32 @main() {
+ %SP = alloca i8 ; <i8*> [#uses=1]
+ %X = add i32 0, 0 ; <i32> [#uses=1]
+ alloca i8, i32 %X ; <i8*>:1 [#uses=0]
+ call i32 @bar( i8* %SP ) ; <i32>:2 [#uses=1]
+ ret i32 %2
+}
--- /dev/null
+; This testcase should return with an exit code of 1.
+;
+; RUN: not %lli %s
+
+@test = global i64 0 ; <i64*> [#uses=1]
+
+define internal i64 @test.upgrd.1() {
+ %tmp.0 = load i64* @test ; <i64> [#uses=1]
+ %tmp.1 = add i64 %tmp.0, 1 ; <i64> [#uses=1]
+ ret i64 %tmp.1
+}
+
+define i32 @main() {
+ %L = call i64 @test.upgrd.1( ) ; <i64> [#uses=1]
+ %I = trunc i64 %L to i32 ; <i32> [#uses=1]
+ ret i32 %I
+}
+
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s test
+
+declare i32 @puts(i8*)
+
+define i32 @main(i32 %argc.1, i8** %argv.1) {
+ %tmp.5 = getelementptr i8** %argv.1, i64 1 ; <i8**> [#uses=1]
+ %tmp.6 = load i8** %tmp.5 ; <i8*> [#uses=1]
+ %tmp.0 = call i32 @puts( i8* %tmp.6 ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @main() {
+entry:
+ br label %endif
+then: ; No predecessors!
+ br label %endif
+endif: ; preds = %then, %entry
+ %x = phi i32 [ 4, %entry ], [ 27, %then ] ; <i32> [#uses=0]
+ %result = phi i32 [ 32, %then ], [ 0, %entry ] ; <i32> [#uses=0]
+ ret i32 0
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+; Testcase distilled from 256.bzip2.
+
+define i32 @main() {
+entry:
+ br label %loopentry.0
+loopentry.0: ; preds = %loopentry.0, %entry
+ %h.0 = phi i32 [ %tmp.2, %loopentry.0 ], [ -1, %entry ] ; <i32> [#uses=1]
+ %tmp.2 = add i32 %h.0, 1 ; <i32> [#uses=3]
+ %tmp.4 = icmp ne i32 %tmp.2, 0 ; <i1> [#uses=1]
+ br i1 %tmp.4, label %loopentry.0, label %loopentry.1
+loopentry.1: ; preds = %loopentry.0
+ %h.1 = phi i32 [ %tmp.2, %loopentry.0 ] ; <i32> [#uses=1]
+ ret i32 %h.1
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+; Testcase distilled from 256.bzip2.
+
+define i32 @main() {
+entry:
+ %X = add i32 1, -1 ; <i32> [#uses=3]
+ br label %Next
+Next: ; preds = %entry
+ %A = phi i32 [ %X, %entry ] ; <i32> [#uses=0]
+ %B = phi i32 [ %X, %entry ] ; <i32> [#uses=0]
+ %C = phi i32 [ %X, %entry ] ; <i32> [#uses=1]
+ ret i32 %C
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+; This testcase failed to work because two variable sized allocas confused the
+; local register allocator.
+
+define i32 @main(i32 %X) {
+ %A = alloca i32, i32 %X ; <i32*> [#uses=0]
+ %B = alloca float, i32 %X ; <float*> [#uses=0]
+ ret i32 0
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+;
+; Regression Test: EnvironmentTest.ll
+;
+; Description:
+; This is a regression test that verifies that the JIT passes the
+; environment to the main() function.
+;
+
+
+declare i32 @strlen(i8*)
+
+define i32 @main(i32 %argc.1, i8** %argv.1, i8** %envp.1) {
+ %tmp.2 = load i8** %envp.1 ; <i8*> [#uses=1]
+ %tmp.3 = call i32 @strlen( i8* %tmp.2 ) ; <i32> [#uses=1]
+ %T = icmp eq i32 %tmp.3, 0 ; <i1> [#uses=1]
+ %R = zext i1 %T to i32 ; <i32> [#uses=1]
+ ret i32 %R
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+; This testcase exposes a bug in the local register allocator where it runs out
+; of registers (due to too many overlapping live ranges), but then attempts to
+; use the ESP register (which is not allocatable) to hold a value.
+
+define i32 @main(i32 %A) {
+ ; ESP gets used again...
+ %Ap2 = alloca i32, i32 %A ; <i32*> [#uses=11]
+ ; Produce lots of overlapping live ranges
+ %B = add i32 %A, 1 ; <i32> [#uses=1]
+ %C = add i32 %A, 2 ; <i32> [#uses=1]
+ %D = add i32 %A, 3 ; <i32> [#uses=1]
+ %E = add i32 %A, 4 ; <i32> [#uses=1]
+ %F = add i32 %A, 5 ; <i32> [#uses=1]
+ %G = add i32 %A, 6 ; <i32> [#uses=1]
+ %H = add i32 %A, 7 ; <i32> [#uses=1]
+ %I = add i32 %A, 8 ; <i32> [#uses=1]
+ %J = add i32 %A, 9 ; <i32> [#uses=1]
+ %K = add i32 %A, 10 ; <i32> [#uses=1]
+ ; Uses of all of the values
+ store i32 %A, i32* %Ap2
+ store i32 %B, i32* %Ap2
+ store i32 %C, i32* %Ap2
+ store i32 %D, i32* %Ap2
+ store i32 %E, i32* %Ap2
+ store i32 %F, i32* %Ap2
+ store i32 %G, i32* %Ap2
+ store i32 %H, i32* %Ap2
+ store i32 %I, i32* %Ap2
+ store i32 %J, i32* %Ap2
+ store i32 %K, i32* %Ap2
+ ret i32 0
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+@A = global i32 0 ; <i32*> [#uses=1]
+
+define i32 @main() {
+ %Ret = call i32 @test( i1 true, i32 0 ) ; <i32> [#uses=1]
+ ret i32 %Ret
+}
+
+define i32 @test(i1 %c, i32 %A) {
+ br i1 %c, label %Taken1, label %NotTaken
+Cont: ; preds = %Taken1, %NotTaken
+ %V = phi i32 [ 0, %NotTaken ], [ sub (i32 ptrtoint (i32* @A to i32), i32 1234), %Taken1 ] ; <i32> [#uses=0]
+ ret i32 0
+NotTaken: ; preds = %0
+ br label %Cont
+Taken1: ; preds = %0
+ %B = icmp eq i32 %A, 0 ; <i1> [#uses=1]
+ br i1 %B, label %Cont, label %ExitError
+ExitError: ; preds = %Taken1
+ ret i32 12
+}
+
--- /dev/null
+; PR672
+; RUN: %lli -use-orcmcjit %s
+; XFAIL: mcjit-ia32
+
+define i32 @main() {
+ %f = bitcast i32 (i32, i32*, i32)* @check_tail to i32* ; <i32*> [#uses=1]
+ %res = tail call fastcc i32 @check_tail( i32 10, i32* %f, i32 10 ) ; <i32> [#uses=1]
+ ret i32 %res
+}
+
+define fastcc i32 @check_tail(i32 %x, i32* %f, i32 %g) {
+ %tmp1 = icmp sgt i32 %x, 0 ; <i1> [#uses=1]
+ br i1 %tmp1, label %if-then, label %if-else
+if-then: ; preds = %0
+ %fun_ptr = bitcast i32* %f to i32 (i32, i32*, i32)* ; <i32 (i32, i32*, i32)*> [#uses=1]
+ %arg1 = add i32 %x, -1 ; <i32> [#uses=1]
+ %res = tail call fastcc i32 %fun_ptr( i32 %arg1, i32* %f, i32 %g ) ; <i32> [#uses=1]
+ ret i32 %res
+if-else: ; preds = %0
+ ret i32 %x
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit -force-interpreter %s
+; PR1836
+
+define i32 @main() {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %tmp = alloca i32 ; <i32*> [#uses=2]
+ %x = alloca i75, align 16 ; <i75*> [#uses=1]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i75 999, i75* %x, align 16
+ store i32 0, i32* %tmp, align 4
+ %tmp1 = load i32* %tmp, align 4 ; <i32> [#uses=1]
+ store i32 %tmp1, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval2 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval2
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit -force-interpreter=true %s | FileCheck %s
+; CHECK: 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+@.str = internal constant [10 x i8] c"MSB = %d\0A\00" ; <[10 x i8]*> [#uses=1]
+
+define i65 @foo(i65 %x) {
+entry:
+ %x_addr = alloca i65 ; <i65*> [#uses=2]
+ %retval = alloca i65 ; <i65*> [#uses=2]
+ %tmp = alloca i65 ; <i65*> [#uses=2]
+ %"alloca point" = bitcast i65 0 to i65 ; <i65> [#uses=0]
+ store i65 %x, i65* %x_addr
+ %tmp1 = load i65* %x_addr, align 4 ; <i65> [#uses=1]
+ %tmp2 = ashr i65 %tmp1, 65 ; <i65> [#uses=1]
+ store i65 %tmp2, i65* %tmp, align 4
+ %tmp3 = load i65* %tmp, align 4 ; <i65> [#uses=1]
+ store i65 %tmp3, i65* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval4 = load i65* %retval ; <i65> [#uses=1]
+ ret i65 %retval4
+}
+
+define i32 @main() {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=1]
+ %iftmp.0 = alloca i32 ; <i32*> [#uses=3]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ %tmp = call i65 @foo( i65 -9 ) ; <i65> [#uses=1]
+ %tmp1 = lshr i65 %tmp, 64 ; <i65> [#uses=1]
+ %tmp2 = xor i65 %tmp1, 1 ; <i65> [#uses=1]
+ %tmp3 = and i65 %tmp2, 1 ; <i65> [#uses=1]
+ %tmp34 = trunc i65 %tmp3 to i8 ; <i8> [#uses=1]
+ %toBool = icmp ne i8 %tmp34, 0 ; <i1> [#uses=1]
+ br i1 %toBool, label %cond_true, label %cond_false
+
+cond_true: ; preds = %entry
+ store i32 0, i32* %iftmp.0, align 4
+ br label %cond_next
+
+cond_false: ; preds = %entry
+ store i32 1, i32* %iftmp.0, align 4
+ br label %cond_next
+
+cond_next: ; preds = %cond_false, %cond_true
+ %tmp5 = getelementptr [10 x i8]* @.str, i32 0, i32 0 ; <i8*> [#uses=1]
+ %tmp6 = load i32* %iftmp.0, align 4 ; <i32> [#uses=1]
+ %tmp7 = call i32 (i8*, ...)* @printf( i8* noalias %tmp5, i32 %tmp6 ) nounwind ; <i32> [#uses=0]
+ br label %return
+
+return: ; preds = %cond_next
+ store i32 0, i32* %retval, align 4
+ %retval8 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval8
+}
+
+declare i32 @printf(i8* noalias , ...) nounwind
--- /dev/null
+; RUN: %lli -use-orcmcjit %s
+;
+; Verify relocations to global symbols with addend work correctly.
+;
+; Compiled from this C code:
+;
+; int test[2] = { -1, 0 };
+; int *p = &test[1];
+;
+; int main (void)
+; {
+; return *p;
+; }
+;
+
+@test = global [2 x i32] [i32 -1, i32 0], align 4
+@p = global i32* getelementptr inbounds ([2 x i32]* @test, i64 0, i64 1), align 8
+
+define i32 @main() {
+entry:
+ %0 = load i32** @p, align 8
+ %1 = load i32* %0, align 4
+ ret i32 %1
+}
+
--- /dev/null
+declare i32 @FA()
+
+define i32 @FB() {
+ %r = call i32 @FA( ) ; <i32> [#uses=1]
+ ret i32 %r
+}
+
--- /dev/null
+declare i32 @FC()
+
+define i32 @FB() {
+ %r = call i32 @FC( ) ; <i32> [#uses=1]
+ ret i32 %r
+}
+
--- /dev/null
+define i32 @FC() {
+ ret i32 0
+}
+
--- /dev/null
+declare i8* @__cxa_allocate_exception(i64)
+declare void @__cxa_throw(i8*, i8*, i8*)
+declare i32 @__gxx_personality_v0(...)
+declare void @__cxa_end_catch()
+declare i8* @__cxa_begin_catch(i8*)
+
+@_ZTIi = external constant i8*
+
+define void @throwException_B() {
+ %exception = tail call i8* @__cxa_allocate_exception(i64 4)
+ call void @__cxa_throw(i8* %exception, i8* bitcast (i8** @_ZTIi to i8*), i8* null)
+ unreachable
+}
+
+define i32 @FB() {
+entry:
+ invoke void @throwException_B()
+ to label %try.cont unwind label %lpad
+
+lpad:
+ %p = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
+ catch i8* bitcast (i8** @_ZTIi to i8*)
+ %e = extractvalue { i8*, i32 } %p, 0
+ call i8* @__cxa_begin_catch(i8* %e)
+ call void @__cxa_end_catch()
+ br label %try.cont
+
+try.cont:
+ ret i32 0
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit -extra-module=%p/Inputs/cross-module-b.ll %s > /dev/null
+
+declare i32 @FB()
+
+define i32 @FA() {
+ ret i32 0
+}
+
+define i32 @main() {
+ %r = call i32 @FB( ) ; <i32> [#uses=1]
+ ret i32 %r
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit -extra-module=%p/Inputs/cross-module-b.ll -relocation-model=pic -code-model=small %s > /dev/null
+; XFAIL: mips, i686, i386
+
+declare i32 @FB()
+
+define i32 @FA() {
+ ret i32 0
+}
+
+define i32 @main() {
+ %r = call i32 @FB( ) ; <i32> [#uses=1]
+ ret i32 %r
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit -relocation-model=pic -code-model=large %s
+; XFAIL: cygwin, win32, mingw, mips, i686, i386, aarch64, arm, asan, msan
+declare i8* @__cxa_allocate_exception(i64)
+declare void @__cxa_throw(i8*, i8*, i8*)
+declare i32 @__gxx_personality_v0(...)
+declare void @__cxa_end_catch()
+declare i8* @__cxa_begin_catch(i8*)
+
+@_ZTIi = external constant i8*
+
+define void @throwException() {
+ %exception = tail call i8* @__cxa_allocate_exception(i64 4)
+ call void @__cxa_throw(i8* %exception, i8* bitcast (i8** @_ZTIi to i8*), i8* null)
+ unreachable
+}
+
+define i32 @main() {
+entry:
+ invoke void @throwException()
+ to label %try.cont unwind label %lpad
+
+lpad:
+ %p = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
+ catch i8* bitcast (i8** @_ZTIi to i8*)
+ %e = extractvalue { i8*, i32 } %p, 0
+ call i8* @__cxa_begin_catch(i8* %e)
+ call void @__cxa_end_catch()
+ br label %try.cont
+
+try.cont:
+ ret i32 0
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit -relocation-model=pic -code-model=small %s
+; XFAIL: cygwin, win32, mingw, mips, i686, i386, darwin, aarch64, arm, asan, msan
+declare i8* @__cxa_allocate_exception(i64)
+declare void @__cxa_throw(i8*, i8*, i8*)
+declare i32 @__gxx_personality_v0(...)
+declare void @__cxa_end_catch()
+declare i8* @__cxa_begin_catch(i8*)
+
+@_ZTIi = external constant i8*
+
+define void @throwException() {
+ %exception = tail call i8* @__cxa_allocate_exception(i64 4)
+ call void @__cxa_throw(i8* %exception, i8* bitcast (i8** @_ZTIi to i8*), i8* null)
+ unreachable
+}
+
+define i32 @main() {
+entry:
+ invoke void @throwException()
+ to label %try.cont unwind label %lpad
+
+lpad:
+ %p = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
+ catch i8* bitcast (i8** @_ZTIi to i8*)
+ %e = extractvalue { i8*, i32 } %p, 0
+ call i8* @__cxa_begin_catch(i8* %e)
+ call void @__cxa_end_catch()
+ br label %try.cont
+
+try.cont:
+ ret i32 0
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit %s
+; XFAIL: arm, cygwin, win32, mingw, asan, msan
+declare i8* @__cxa_allocate_exception(i64)
+declare void @__cxa_throw(i8*, i8*, i8*)
+declare i32 @__gxx_personality_v0(...)
+declare void @__cxa_end_catch()
+declare i8* @__cxa_begin_catch(i8*)
+
+@_ZTIi = external constant i8*
+
+define void @throwException() {
+ %exception = tail call i8* @__cxa_allocate_exception(i64 4)
+ call void @__cxa_throw(i8* %exception, i8* bitcast (i8** @_ZTIi to i8*), i8* null)
+ unreachable
+}
+
+define i32 @main() {
+entry:
+ invoke void @throwException()
+ to label %try.cont unwind label %lpad
+
+lpad:
+ %p = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
+ catch i8* bitcast (i8** @_ZTIi to i8*)
+ %e = extractvalue { i8*, i32 } %p, 0
+ call i8* @__cxa_begin_catch(i8* %e)
+ call void @__cxa_end_catch()
+ br label %try.cont
+
+try.cont:
+ ret i32 0
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit -force-interpreter=true %s | FileCheck %s
+; CHECK: 40091eb8
+
+define i32 @test(double %x) {
+entry:
+ %x46.i = bitcast double %x to i64
+ %tmp343.i = lshr i64 %x46.i, 32
+ %tmp344.i = trunc i64 %tmp343.i to i32
+ ret i32 %tmp344.i
+}
+
+define i32 @main()
+{
+ %res = call i32 @test(double 3.14)
+ %ptr = getelementptr [4 x i8]* @format, i32 0, i32 0
+ call i32 (i8*,...)* @printf(i8* %ptr, i32 %res)
+ ret i32 0
+}
+
+declare i32 @printf(i8*, ...)
+@format = internal constant [4 x i8] c"%x\0A\00"
--- /dev/null
+; RUN: %lli -use-orcmcjit -relocation-model=pic -code-model=small %s > /dev/null
+; XFAIL: mips, i686, i386, darwin, aarch64, arm
+
+@.LC0 = internal global [12 x i8] c"Hello World\00" ; <[12 x i8]*> [#uses=1]
+
+declare i32 @puts(i8*)
+
+define i32 @main() {
+ %reg210 = call i32 @puts( i8* getelementptr ([12 x i8]* @.LC0, i64 0, i64 0) ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+@.LC0 = internal global [12 x i8] c"Hello World\00" ; <[12 x i8]*> [#uses=1]
+
+declare i32 @puts(i8*)
+
+define i32 @main() {
+ %reg210 = call i32 @puts( i8* getelementptr ([12 x i8]* @.LC0, i64 0, i64 0) ) ; <i32> [#uses=0]
+ ret i32 0
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+@X = global i32 7 ; <i32*> [#uses=0]
+@msg = internal global [13 x i8] c"Hello World\0A\00" ; <[13 x i8]*> [#uses=1]
+
+declare void @printf([13 x i8]*, ...)
+
+define void @bar() {
+ call void ([13 x i8]*, ...)* @printf( [13 x i8]* @msg )
+ ret void
+}
+
+define i32 @main() {
+ call void @bar( )
+ ret i32 0
+}
+
--- /dev/null
+root = config.root
+targets = root.targets
+if ('X86' in targets) | ('AArch64' in targets) | ('ARM' in targets) | \
+ ('Mips' in targets) | ('PowerPC' in targets) | ('SystemZ' in targets):
+ config.unsupported = False
+else:
+ config.unsupported = True
+
+# FIXME: autoconf and cmake produce different arch names. We should normalize
+# them before getting here.
+if root.host_arch not in ['i386', 'x86', 'x86_64', 'AMD64',
+ 'AArch64', 'ARM', 'Mips', 'PowerPC', 'ppc64', 'SystemZ']:
+ config.unsupported = True
+
+if 'armv7' in root.host_arch:
+ config.unsupported = False
+
+if 'i386-apple-darwin' in root.target_triple:
+ config.unsupported = True
+
+if 'powerpc' in root.target_triple and not 'powerpc64' in root.target_triple:
+ config.unsupported = True
+
+# ExecutionEngine tests are not expected to pass in a cross-compilation setup.
+if 'native' not in config.available_features:
+ config.unsupported = True
--- /dev/null
+; This first line will generate the .o files for the next run line
+; RUN: rm -rf %t.cachedir %t.cachedir2 %t.cachedir3
+; RUN: mkdir -p %t.cachedir %t.cachedir2 %t.cachedir3
+; RUN: %lli -use-orcmcjit -extra-module=%p/Inputs/multi-module-b.ll -extra-module=%p/Inputs/multi-module-c.ll -enable-cache-manager -object-cache-dir=%t.cachedir %s
+
+; Collect generated objects.
+; RUN: find %t.cachedir -type f -name 'multi-module-?.o' -exec mv -v '{}' %t.cachedir2 ';'
+
+; This line tests MCJIT object loading
+; RUN: %lli -use-orcmcjit -extra-object=%t.cachedir2/multi-module-b.o -extra-object=%t.cachedir2/multi-module-c.o %s
+
+; These lines put the object files into an archive
+; RUN: llvm-ar r %t.cachedir3/load-object.a %t.cachedir2/multi-module-b.o
+; RUN: llvm-ar r %t.cachedir3/load-object.a %t.cachedir2/multi-module-c.o
+
+; This line test MCJIT archive loading
+; RUN: %lli -use-orcmcjit -extra-archive=%t.cachedir3/load-object.a %s
+
+declare i32 @FB()
+
+define i32 @main() {
+ %r = call i32 @FB( ) ; <i32> [#uses=1]
+ ret i32 %r
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit -extra-module=%p/Inputs/multi-module-b.ll -extra-module=%p/Inputs/multi-module-c.ll %s > /dev/null
+
+declare i32 @FB()
+
+define i32 @main() {
+ %r = call i32 @FB( ) ; <i32> [#uses=1]
+ ret i32 %r
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit -extra-module=%p/Inputs/multi-module-eh-b.ll %s
+; XFAIL: arm, cygwin, win32, mingw, asan, msan
+declare i8* @__cxa_allocate_exception(i64)
+declare void @__cxa_throw(i8*, i8*, i8*)
+declare i32 @__gxx_personality_v0(...)
+declare void @__cxa_end_catch()
+declare i8* @__cxa_begin_catch(i8*)
+
+@_ZTIi = external constant i8*
+
+declare i32 @FB()
+
+define void @throwException() {
+ %exception = tail call i8* @__cxa_allocate_exception(i64 4)
+ call void @__cxa_throw(i8* %exception, i8* bitcast (i8** @_ZTIi to i8*), i8* null)
+ unreachable
+}
+
+define i32 @main() {
+entry:
+ invoke void @throwException()
+ to label %try.cont unwind label %lpad
+
+lpad:
+ %p = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
+ catch i8* bitcast (i8** @_ZTIi to i8*)
+ %e = extractvalue { i8*, i32 } %p, 0
+ call i8* @__cxa_begin_catch(i8* %e)
+ call void @__cxa_end_catch()
+ br label %try.cont
+
+try.cont:
+ %r = call i32 @FB( )
+ ret i32 %r
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit -extra-module=%p/Inputs/multi-module-b.ll -extra-module=%p/Inputs/multi-module-c.ll -relocation-model=pic -code-model=small %s > /dev/null
+; XFAIL: mips, i686, i386
+
+declare i32 @FB()
+
+define i32 @main() {
+ %r = call i32 @FB( ) ; <i32> [#uses=1]
+ ret i32 %r
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @foo(i32 %x, i32 %y, double %d) {
+entry:
+ %d.int64 = bitcast double %d to i64
+ %d.top64 = lshr i64 %d.int64, 32
+ %d.top = trunc i64 %d.top64 to i32
+ %d.bottom = trunc i64 %d.int64 to i32
+ %topCorrect = icmp eq i32 %d.top, 3735928559
+ %bottomCorrect = icmp eq i32 %d.bottom, 4277009102
+ %right = and i1 %topCorrect, %bottomCorrect
+ %nRight = xor i1 %right, true
+ %retVal = zext i1 %nRight to i32
+ ret i32 %retVal
+}
+
+define i32 @main() {
+entry:
+ %call = call i32 @foo(i32 0, i32 1, double 0xDEADBEEFFEEDFACE)
+ ret i32 %call
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit -O0 -disable-lazy-compilation=false %s
+
+; The intention of this test is to verify that symbols mapped to COMMON in ELF
+; work as expected.
+;
+; Compiled from this C code:
+;
+; int zero_int;
+; double zero_double;
+; int zero_arr[10];
+;
+; int main()
+; {
+; zero_arr[zero_int + 5] = 40;
+;
+; if (zero_double < 1.1)
+; zero_arr[zero_int + 2] = 70;
+;
+; for (int i = 1; i < 10; ++i) {
+; zero_arr[i] = zero_arr[i - 1] + zero_arr[i];
+; }
+; return zero_arr[9] == 110 ? 0 : -1;
+; }
+
+@zero_int = common global i32 0, align 4
+@zero_arr = common global [10 x i32] zeroinitializer, align 16
+@zero_double = common global double 0.000000e+00, align 8
+
+define i32 @main() nounwind {
+entry:
+ %retval = alloca i32, align 4
+ %i = alloca i32, align 4
+ store i32 0, i32* %retval
+ %0 = load i32* @zero_int, align 4
+ %add = add nsw i32 %0, 5
+ %idxprom = sext i32 %add to i64
+ %arrayidx = getelementptr inbounds [10 x i32]* @zero_arr, i32 0, i64 %idxprom
+ store i32 40, i32* %arrayidx, align 4
+ %1 = load double* @zero_double, align 8
+ %cmp = fcmp olt double %1, 1.100000e+00
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ %2 = load i32* @zero_int, align 4
+ %add1 = add nsw i32 %2, 2
+ %idxprom2 = sext i32 %add1 to i64
+ %arrayidx3 = getelementptr inbounds [10 x i32]* @zero_arr, i32 0, i64 %idxprom2
+ store i32 70, i32* %arrayidx3, align 4
+ br label %if.end
+
+if.end: ; preds = %if.then, %entry
+ store i32 1, i32* %i, align 4
+ br label %for.cond
+
+for.cond: ; preds = %for.inc, %if.end
+ %3 = load i32* %i, align 4
+ %cmp4 = icmp slt i32 %3, 10
+ br i1 %cmp4, label %for.body, label %for.end
+
+for.body: ; preds = %for.cond
+ %4 = load i32* %i, align 4
+ %sub = sub nsw i32 %4, 1
+ %idxprom5 = sext i32 %sub to i64
+ %arrayidx6 = getelementptr inbounds [10 x i32]* @zero_arr, i32 0, i64 %idxprom5
+ %5 = load i32* %arrayidx6, align 4
+ %6 = load i32* %i, align 4
+ %idxprom7 = sext i32 %6 to i64
+ %arrayidx8 = getelementptr inbounds [10 x i32]* @zero_arr, i32 0, i64 %idxprom7
+ %7 = load i32* %arrayidx8, align 4
+ %add9 = add nsw i32 %5, %7
+ %8 = load i32* %i, align 4
+ %idxprom10 = sext i32 %8 to i64
+ %arrayidx11 = getelementptr inbounds [10 x i32]* @zero_arr, i32 0, i64 %idxprom10
+ store i32 %add9, i32* %arrayidx11, align 4
+ br label %for.inc
+
+for.inc: ; preds = %for.body
+ %9 = load i32* %i, align 4
+ %inc = add nsw i32 %9, 1
+ store i32 %inc, i32* %i, align 4
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ %10 = load i32* getelementptr inbounds ([10 x i32]* @zero_arr, i32 0, i64 9), align 4
+ %cmp12 = icmp eq i32 %10, 110
+ %cond = select i1 %cmp12, i32 0, i32 -1
+ ret i32 %cond
+}
--- /dev/null
+declare i32 @FA()
+
+define i32 @FB() nounwind {
+ %r = call i32 @FA( ) ; <i32> [#uses=1]
+ ret i32 %r
+}
+
--- /dev/null
+declare i32 @FC()
+
+define i32 @FB() nounwind {
+ %r = call i32 @FC( ) ; <i32> [#uses=1]
+ ret i32 %r
+}
+
--- /dev/null
+define i32 @FC() nounwind {
+ ret i32 0
+}
+
--- /dev/null
+; RUN: %lli -extra-module=%p/Inputs/cross-module-b.ll -disable-lazy-compilation=true -remote-mcjit -mcjit-remote-process=lli-child-target%exeext %s > /dev/null
+
+declare i32 @FB()
+
+define i32 @FA() nounwind {
+ ret i32 0
+}
+
+define i32 @main() nounwind {
+ %r = call i32 @FB( ) ; <i32> [#uses=1]
+ ret i32 %r
+}
--- /dev/null
+; RUN: %lli -extra-module=%p/Inputs/cross-module-b.ll -disable-lazy-compilation=true -remote-mcjit -mcjit-remote-process=lli-child-target%exeext -relocation-model=pic -code-model=small %s > /dev/null
+; XFAIL: mips, i686, i386, arm
+
+declare i32 @FB()
+
+define i32 @FA() {
+ ret i32 0
+}
+
+define i32 @main() {
+ %r = call i32 @FB( ) ; <i32> [#uses=1]
+ ret i32 %r
+}
+
--- /dev/null
+if 'armv4' in config.root.target_triple or \
+ 'armv5' in config.root.target_triple:
+ config.unsupported = True
+
+# This is temporary, until Remote MCJIT works on ARM
+# See http://llvm.org/bugs/show_bug.cgi?id=18057
+#if 'armv7' in config.root.target_triple:
+# config.unsupported = True
--- /dev/null
+; RUN: %lli -extra-module=%p/Inputs/multi-module-b.ll -extra-module=%p/Inputs/multi-module-c.ll -disable-lazy-compilation=true -remote-mcjit -mcjit-remote-process=lli-child-target%exeext %s > /dev/null
+
+declare i32 @FB()
+
+define i32 @main() nounwind {
+ %r = call i32 @FB( ) ; <i32> [#uses=1]
+ ret i32 %r
+}
+
--- /dev/null
+; RUN: %lli -extra-module=%p/Inputs/multi-module-b.ll -extra-module=%p/Inputs/multi-module-c.ll -disable-lazy-compilation=true -remote-mcjit -mcjit-remote-process=lli-child-target%exeext -relocation-model=pic -code-model=small %s > /dev/null
+; XFAIL: mips, i686, i386, arm
+
+declare i32 @FB()
+
+define i32 @main() {
+ %r = call i32 @FB( ) ; <i32> [#uses=1]
+ ret i32 %r
+}
+
--- /dev/null
+; RUN: %lli -remote-mcjit -mcjit-remote-process=lli-child-target%exeext %s > /dev/null
+
+define i32 @bar() nounwind {
+ ret i32 0
+}
+
+define i32 @main() nounwind {
+ %r = call i32 @bar( ) ; <i32> [#uses=1]
+ ret i32 %r
+}
--- /dev/null
+; RUN: %lli -remote-mcjit -disable-lazy-compilation=false -mcjit-remote-process=lli-child-target%exeext %s
+; XFAIL: *
+; This test should fail until remote symbol resolution is supported.
+
+define i32 @main() nounwind {
+entry:
+ call void @lazily_compiled_address_is_consistent()
+ ret i32 0
+}
+
+; Test PR3043: @test should have the same address before and after
+; it's JIT-compiled.
+@funcPtr = common global i1 ()* null, align 4
+@lcaic_failure = internal constant [46 x i8] c"@lazily_compiled_address_is_consistent failed\00"
+
+define void @lazily_compiled_address_is_consistent() nounwind {
+entry:
+ store i1 ()* @test, i1 ()** @funcPtr
+ %pass = tail call i1 @test() ; <i32> [#uses=1]
+ br i1 %pass, label %pass_block, label %fail_block
+pass_block:
+ ret void
+fail_block:
+ call i32 @puts(i8* getelementptr([46 x i8]* @lcaic_failure, i32 0, i32 0))
+ call void @exit(i32 1)
+ unreachable
+}
+
+define i1 @test() nounwind {
+entry:
+ %tmp = load i1 ()** @funcPtr
+ %eq = icmp eq i1 ()* %tmp, @test
+ ret i1 %eq
+}
+
+declare i32 @puts(i8*) noreturn
+declare void @exit(i32) noreturn
--- /dev/null
+; RUN: %lli -remote-mcjit -disable-lazy-compilation=false -relocation-model=pic -code-model=small %s
+; XFAIL: *
+; This function should fail until remote symbol resolution is supported.
+
+define i32 @main() nounwind {
+entry:
+ call void @lazily_compiled_address_is_consistent()
+ ret i32 0
+}
+
+; Test PR3043: @test should have the same address before and after
+; it's JIT-compiled.
+@funcPtr = common global i1 ()* null, align 4
+@lcaic_failure = internal constant [46 x i8] c"@lazily_compiled_address_is_consistent failed\00"
+
+define void @lazily_compiled_address_is_consistent() nounwind {
+entry:
+ store i1 ()* @test, i1 ()** @funcPtr
+ %pass = tail call i1 @test() ; <i32> [#uses=1]
+ br i1 %pass, label %pass_block, label %fail_block
+pass_block:
+ ret void
+fail_block:
+ call i32 @puts(i8* getelementptr([46 x i8]* @lcaic_failure, i32 0, i32 0))
+ call void @exit(i32 1)
+ unreachable
+}
+
+define i1 @test() nounwind {
+entry:
+ %tmp = load i1 ()** @funcPtr
+ %eq = icmp eq i1 ()* %tmp, @test
+ ret i1 %eq
+}
+
+declare i32 @puts(i8*) noreturn
+declare void @exit(i32) noreturn
--- /dev/null
+; RUN: %lli -remote-mcjit -O0 -disable-lazy-compilation=false -mcjit-remote-process=lli-child-target%exeext %s
+
+; The intention of this test is to verify that symbols mapped to COMMON in ELF
+; work as expected.
+;
+; Compiled from this C code:
+;
+; int zero_int;
+; double zero_double;
+; int zero_arr[10];
+;
+; int main()
+; {
+; zero_arr[zero_int + 5] = 40;
+;
+; if (zero_double < 1.0)
+; zero_arr[zero_int + 2] = 70;
+;
+; for (int i = 1; i < 10; ++i) {
+; zero_arr[i] = zero_arr[i - 1] + zero_arr[i];
+; }
+; return zero_arr[9] == 110 ? 0 : -1;
+; }
+
+@zero_int = common global i32 0, align 4
+@zero_arr = common global [10 x i32] zeroinitializer, align 16
+@zero_double = common global double 0.000000e+00, align 8
+
+define i32 @main() nounwind {
+entry:
+ %retval = alloca i32, align 4
+ %i = alloca i32, align 4
+ store i32 0, i32* %retval
+ %0 = load i32* @zero_int, align 4
+ %add = add nsw i32 %0, 5
+ %idxprom = sext i32 %add to i64
+ %arrayidx = getelementptr inbounds [10 x i32]* @zero_arr, i32 0, i64 %idxprom
+ store i32 40, i32* %arrayidx, align 4
+ %1 = load double* @zero_double, align 8
+ %cmp = fcmp olt double %1, 1.000000e+00
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ %2 = load i32* @zero_int, align 4
+ %add1 = add nsw i32 %2, 2
+ %idxprom2 = sext i32 %add1 to i64
+ %arrayidx3 = getelementptr inbounds [10 x i32]* @zero_arr, i32 0, i64 %idxprom2
+ store i32 70, i32* %arrayidx3, align 4
+ br label %if.end
+
+if.end: ; preds = %if.then, %entry
+ store i32 1, i32* %i, align 4
+ br label %for.cond
+
+for.cond: ; preds = %for.inc, %if.end
+ %3 = load i32* %i, align 4
+ %cmp4 = icmp slt i32 %3, 10
+ br i1 %cmp4, label %for.body, label %for.end
+
+for.body: ; preds = %for.cond
+ %4 = load i32* %i, align 4
+ %sub = sub nsw i32 %4, 1
+ %idxprom5 = sext i32 %sub to i64
+ %arrayidx6 = getelementptr inbounds [10 x i32]* @zero_arr, i32 0, i64 %idxprom5
+ %5 = load i32* %arrayidx6, align 4
+ %6 = load i32* %i, align 4
+ %idxprom7 = sext i32 %6 to i64
+ %arrayidx8 = getelementptr inbounds [10 x i32]* @zero_arr, i32 0, i64 %idxprom7
+ %7 = load i32* %arrayidx8, align 4
+ %add9 = add nsw i32 %5, %7
+ %8 = load i32* %i, align 4
+ %idxprom10 = sext i32 %8 to i64
+ %arrayidx11 = getelementptr inbounds [10 x i32]* @zero_arr, i32 0, i64 %idxprom10
+ store i32 %add9, i32* %arrayidx11, align 4
+ br label %for.inc
+
+for.inc: ; preds = %for.body
+ %9 = load i32* %i, align 4
+ %inc = add nsw i32 %9, 1
+ store i32 %inc, i32* %i, align 4
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ %10 = load i32* getelementptr inbounds ([10 x i32]* @zero_arr, i32 0, i64 9), align 4
+ %cmp12 = icmp eq i32 %10, 110
+ %cond = select i1 %cmp12, i32 0, i32 -1
+ ret i32 %cond
+}
--- /dev/null
+; RUN: %lli -remote-mcjit -O0 -mcjit-remote-process=lli-child-target%exeext %s
+
+; Check that a variable is always aligned as specified.
+
+@var = global i32 0, align 32
+define i32 @main() nounwind {
+ %addr = ptrtoint i32* @var to i64
+ %mask = and i64 %addr, 31
+ %tst = icmp eq i64 %mask, 0
+ br i1 %tst, label %good, label %bad
+good:
+ ret i32 0
+bad:
+ ret i32 1
+}
--- /dev/null
+; RUN: %lli -remote-mcjit -mcjit-remote-process=lli-child-target%exeext %s > /dev/null
+
+define double @test(double* %DP, double %Arg) nounwind {
+ %D = load double* %DP ; <double> [#uses=1]
+ %V = fadd double %D, 1.000000e+00 ; <double> [#uses=2]
+ %W = fsub double %V, %V ; <double> [#uses=3]
+ %X = fmul double %W, %W ; <double> [#uses=2]
+ %Y = fdiv double %X, %X ; <double> [#uses=2]
+ %Q = fadd double %Y, %Arg ; <double> [#uses=1]
+ %R = bitcast double %Q to double ; <double> [#uses=1]
+ store double %Q, double* %DP
+ ret double %Y
+}
+
+define i32 @main() nounwind {
+ %X = alloca double ; <double*> [#uses=2]
+ store double 0.000000e+00, double* %X
+ call double @test( double* %X, double 2.000000e+00 ) ; <double>:1 [#uses=0]
+ ret i32 0
+}
--- /dev/null
+; RUN: %lli -remote-mcjit -mcjit-remote-process=lli-child-target%exeext %s > /dev/null
+
+@count = global i32 1, align 4
+
+define i32 @main() nounwind {
+entry:
+ %retval = alloca i32, align 4
+ %i = alloca i32, align 4
+ store i32 0, i32* %retval
+ store i32 0, i32* %i, align 4
+ br label %for.cond
+
+for.cond: ; preds = %for.inc, %entry
+ %0 = load i32* %i, align 4
+ %cmp = icmp slt i32 %0, 49
+ br i1 %cmp, label %for.body, label %for.end
+
+for.body: ; preds = %for.cond
+ %1 = load i32* @count, align 4
+ %inc = add nsw i32 %1, 1
+ store i32 %inc, i32* @count, align 4
+ br label %for.inc
+
+for.inc: ; preds = %for.body
+ %2 = load i32* %i, align 4
+ %inc1 = add nsw i32 %2, 1
+ store i32 %inc1, i32* %i, align 4
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ %3 = load i32* @count, align 4
+ %sub = sub nsw i32 %3, 50
+ ret i32 %sub
+}
--- /dev/null
+; RUN: %lli -remote-mcjit -relocation-model=pic -code-model=small %s > /dev/null
+; XFAIL: mips, aarch64, arm, i686, i386
+
+@count = global i32 1, align 4
+
+define i32 @main() nounwind uwtable {
+entry:
+ %retval = alloca i32, align 4
+ %i = alloca i32, align 4
+ store i32 0, i32* %retval
+ store i32 0, i32* %i, align 4
+ br label %for.cond
+
+for.cond: ; preds = %for.inc, %entry
+ %0 = load i32* %i, align 4
+ %cmp = icmp slt i32 %0, 49
+ br i1 %cmp, label %for.body, label %for.end
+
+for.body: ; preds = %for.cond
+ %1 = load i32* @count, align 4
+ %inc = add nsw i32 %1, 1
+ store i32 %inc, i32* @count, align 4
+ br label %for.inc
+
+for.inc: ; preds = %for.body
+ %2 = load i32* %i, align 4
+ %inc1 = add nsw i32 %2, 1
+ store i32 %inc1, i32* %i, align 4
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ %3 = load i32* @count, align 4
+ %sub = sub nsw i32 %3, 50
+ ret i32 %sub
+}
--- /dev/null
+; RUN: %lli -remote-mcjit -O0 -mcjit-remote-process=lli-child-target%exeext %s
+
+@.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
+@ptr = global i8* getelementptr inbounds ([6 x i8]* @.str, i32 0, i32 0), align 4
+@.str1 = private unnamed_addr constant [6 x i8] c"data2\00", align 1
+@ptr2 = global i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0), align 4
+
+define i32 @main(i32 %argc, i8** nocapture %argv) nounwind readonly {
+entry:
+ %0 = load i8** @ptr, align 4
+ %1 = load i8** @ptr2, align 4
+ %cmp = icmp eq i8* %0, %1
+ %. = zext i1 %cmp to i32
+ ret i32 %.
+}
--- /dev/null
+; RUN: %lli -remote-mcjit -O0 -relocation-model=pic -code-model=small %s
+; XFAIL: mips, aarch64, arm, i686, i386
+
+@.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
+@ptr = global i8* getelementptr inbounds ([6 x i8]* @.str, i32 0, i32 0), align 4
+@.str1 = private unnamed_addr constant [6 x i8] c"data2\00", align 1
+@ptr2 = global i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0), align 4
+
+define i32 @main(i32 %argc, i8** nocapture %argv) nounwind readonly {
+entry:
+ %0 = load i8** @ptr, align 4
+ %1 = load i8** @ptr2, align 4
+ %cmp = icmp eq i8* %0, %1
+ %. = zext i1 %cmp to i32
+ ret i32 %.
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @main() {
+ ret i32 0
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @bar() {
+ ret i32 0
+}
+
+define i32 @main() {
+ %r = call i32 @bar( ) ; <i32> [#uses=1]
+ ret i32 %r
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit -disable-lazy-compilation=false -relocation-model=pic -code-model=small %s
+; XFAIL: mips, i686, i386, aarch64, arm
+
+define i32 @main() nounwind {
+entry:
+ call void @lazily_compiled_address_is_consistent()
+ ret i32 0
+}
+
+; Test PR3043: @test should have the same address before and after
+; it's JIT-compiled.
+@funcPtr = common global i1 ()* null, align 4
+@lcaic_failure = internal constant [46 x i8] c"@lazily_compiled_address_is_consistent failed\00"
+
+define void @lazily_compiled_address_is_consistent() nounwind {
+entry:
+ store i1 ()* @test, i1 ()** @funcPtr
+ %pass = tail call i1 @test() ; <i32> [#uses=1]
+ br i1 %pass, label %pass_block, label %fail_block
+pass_block:
+ ret void
+fail_block:
+ call i32 @puts(i8* getelementptr([46 x i8]* @lcaic_failure, i32 0, i32 0))
+ call void @exit(i32 1)
+ unreachable
+}
+
+define i1 @test() nounwind {
+entry:
+ %tmp = load i1 ()** @funcPtr
+ %eq = icmp eq i1 ()* %tmp, @test
+ ret i1 %eq
+}
+
+declare i32 @puts(i8*) noreturn
+declare void @exit(i32) noreturn
--- /dev/null
+; RUN: %lli -use-orcmcjit -disable-lazy-compilation=false %s
+
+define i32 @main() nounwind {
+entry:
+ call void @lazily_compiled_address_is_consistent()
+ ret i32 0
+}
+
+; Test PR3043: @test should have the same address before and after
+; it's JIT-compiled.
+@funcPtr = common global i1 ()* null, align 4
+@lcaic_failure = internal constant [46 x i8] c"@lazily_compiled_address_is_consistent failed\00"
+
+define void @lazily_compiled_address_is_consistent() nounwind {
+entry:
+ store i1 ()* @test, i1 ()** @funcPtr
+ %pass = tail call i1 @test() ; <i32> [#uses=1]
+ br i1 %pass, label %pass_block, label %fail_block
+pass_block:
+ ret void
+fail_block:
+ call i32 @puts(i8* getelementptr([46 x i8]* @lcaic_failure, i32 0, i32 0))
+ call void @exit(i32 1)
+ unreachable
+}
+
+define i1 @test() nounwind {
+entry:
+ %tmp = load i1 ()** @funcPtr
+ %eq = icmp eq i1 ()* %tmp, @test
+ ret i1 %eq
+}
+
+declare i32 @puts(i8*) noreturn
+declare void @exit(i32) noreturn
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @main() {
+ %A = add i8 0, 12 ; <i8> [#uses=1]
+ %B = sub i8 %A, 1 ; <i8> [#uses=2]
+ %C = mul i8 %B, %B ; <i8> [#uses=2]
+ %D = sdiv i8 %C, %C ; <i8> [#uses=2]
+ %E = srem i8 %D, %D ; <i8> [#uses=0]
+ %F = udiv i8 5, 6 ; <i8> [#uses=0]
+ %G = urem i8 6, 5 ; <i8> [#uses=0]
+ %A.upgrd.1 = add i16 0, 12 ; <i16> [#uses=1]
+ %B.upgrd.2 = sub i16 %A.upgrd.1, 1 ; <i16> [#uses=2]
+ %C.upgrd.3 = mul i16 %B.upgrd.2, %B.upgrd.2 ; <i16> [#uses=2]
+ %D.upgrd.4 = sdiv i16 %C.upgrd.3, %C.upgrd.3 ; <i16> [#uses=2]
+ %E.upgrd.5 = srem i16 %D.upgrd.4, %D.upgrd.4 ; <i16> [#uses=0]
+ %F.upgrd.6 = udiv i16 5, 6 ; <i16> [#uses=0]
+ %G.upgrd.7 = urem i32 6, 5 ; <i32> [#uses=0]
+ %A.upgrd.8 = add i32 0, 12 ; <i32> [#uses=1]
+ %B.upgrd.9 = sub i32 %A.upgrd.8, 1 ; <i32> [#uses=2]
+ %C.upgrd.10 = mul i32 %B.upgrd.9, %B.upgrd.9 ; <i32> [#uses=2]
+ %D.upgrd.11 = sdiv i32 %C.upgrd.10, %C.upgrd.10 ; <i32> [#uses=2]
+ %E.upgrd.12 = srem i32 %D.upgrd.11, %D.upgrd.11 ; <i32> [#uses=0]
+ %F.upgrd.13 = udiv i32 5, 6 ; <i32> [#uses=0]
+ %G1 = urem i32 6, 5 ; <i32> [#uses=0]
+ %A.upgrd.14 = add i64 0, 12 ; <i64> [#uses=1]
+ %B.upgrd.15 = sub i64 %A.upgrd.14, 1 ; <i64> [#uses=2]
+ %C.upgrd.16 = mul i64 %B.upgrd.15, %B.upgrd.15 ; <i64> [#uses=2]
+ %D.upgrd.17 = sdiv i64 %C.upgrd.16, %C.upgrd.16 ; <i64> [#uses=2]
+ %E.upgrd.18 = srem i64 %D.upgrd.17, %D.upgrd.17 ; <i64> [#uses=0]
+ %F.upgrd.19 = udiv i64 5, 6 ; <i64> [#uses=0]
+ %G.upgrd.20 = urem i64 6, 5 ; <i64> [#uses=0]
+ ret i32 0
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+; test unconditional branch
+define i32 @main() {
+ br label %Test
+Test: ; preds = %Test, %0
+ %X = icmp eq i32 0, 4 ; <i1> [#uses=1]
+ br i1 %X, label %Test, label %Label
+Label: ; preds = %Test
+ ret i32 0
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @_Z14func_exit_codev() nounwind uwtable {
+entry:
+ ret i32 0
+}
+
+define i32 @main() nounwind uwtable {
+entry:
+ %retval = alloca i32, align 4
+ store i32 0, i32* %retval
+ %call = call i32 @_Z14func_exit_codev()
+ ret i32 %call
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+declare void @exit(i32)
+
+define i32 @test(i8 %C, i16 %S) {
+ %X = trunc i16 %S to i8 ; <i8> [#uses=1]
+ %Y = zext i8 %X to i32 ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
+define void @FP(void (i32)* %F) {
+ %X = call i32 @test( i8 123, i16 1024 ) ; <i32> [#uses=1]
+ call void %F( i32 %X )
+ ret void
+}
+
+define i32 @main() {
+ call void @FP( void (i32)* @exit )
+ ret i32 1
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @foo() {
+ ret i32 0
+}
+
+define i32 @main() {
+ icmp ne i1 true, false ; <i1>:1 [#uses=0]
+ zext i1 true to i8 ; <i8>:2 [#uses=0]
+ zext i1 true to i8 ; <i8>:3 [#uses=0]
+ zext i1 true to i16 ; <i16>:4 [#uses=0]
+ zext i1 true to i16 ; <i16>:5 [#uses=0]
+ zext i1 true to i32 ; <i32>:6 [#uses=0]
+ zext i1 true to i32 ; <i32>:7 [#uses=0]
+ zext i1 true to i64 ; <i64>:8 [#uses=0]
+ zext i1 true to i64 ; <i64>:9 [#uses=0]
+ uitofp i1 true to float ; <float>:10 [#uses=0]
+ uitofp i1 true to double ; <double>:11 [#uses=0]
+ icmp ne i8 0, 0 ; <i1>:12 [#uses=0]
+ icmp ne i8 1, 0 ; <i1>:13 [#uses=0]
+ bitcast i8 0 to i8 ; <i8>:14 [#uses=0]
+ bitcast i8 -1 to i8 ; <i8>:15 [#uses=0]
+ sext i8 4 to i16 ; <i16>:16 [#uses=0]
+ sext i8 4 to i16 ; <i16>:17 [#uses=0]
+ sext i8 4 to i64 ; <i64>:18 [#uses=0]
+ sext i8 4 to i64 ; <i64>:19 [#uses=0]
+ sitofp i8 4 to float ; <float>:20 [#uses=0]
+ sitofp i8 4 to double ; <double>:21 [#uses=0]
+ icmp ne i8 0, 0 ; <i1>:22 [#uses=0]
+ icmp ne i8 1, 0 ; <i1>:23 [#uses=0]
+ bitcast i8 0 to i8 ; <i8>:24 [#uses=0]
+ bitcast i8 1 to i8 ; <i8>:25 [#uses=0]
+ zext i8 4 to i16 ; <i16>:26 [#uses=0]
+ zext i8 4 to i16 ; <i16>:27 [#uses=0]
+ zext i8 4 to i64 ; <i64>:28 [#uses=0]
+ zext i8 4 to i64 ; <i64>:29 [#uses=0]
+ uitofp i8 0 to float ; <float>:30 [#uses=0]
+ uitofp i8 0 to double ; <double>:31 [#uses=0]
+ icmp ne i16 1, 0 ; <i1>:32 [#uses=0]
+ trunc i16 -1 to i8 ; <i8>:33 [#uses=0]
+ trunc i16 255 to i8 ; <i8>:34 [#uses=0]
+ bitcast i16 0 to i16 ; <i16>:35 [#uses=0]
+ bitcast i16 0 to i16 ; <i16>:36 [#uses=0]
+ sext i16 0 to i64 ; <i64>:37 [#uses=0]
+ sext i16 0 to i64 ; <i64>:38 [#uses=0]
+ sitofp i16 0 to float ; <float>:39 [#uses=0]
+ sitofp i16 0 to double ; <double>:40 [#uses=0]
+ icmp ne i16 1, 0 ; <i1>:41 [#uses=0]
+ trunc i16 1 to i8 ; <i8>:42 [#uses=0]
+ trunc i16 255 to i8 ; <i8>:43 [#uses=0]
+ bitcast i16 0 to i16 ; <i16>:44 [#uses=0]
+ bitcast i16 0 to i16 ; <i16>:45 [#uses=0]
+ zext i16 0 to i64 ; <i64>:46 [#uses=0]
+ zext i16 0 to i64 ; <i64>:47 [#uses=0]
+ uitofp i16 0 to float ; <float>:48 [#uses=0]
+ uitofp i16 0 to double ; <double>:49 [#uses=0]
+ icmp ne i32 6, 0 ; <i1>:50 [#uses=0]
+ trunc i32 -6 to i8 ; <i8>:51 [#uses=0]
+ trunc i32 6 to i8 ; <i8>:52 [#uses=0]
+ trunc i32 6 to i16 ; <i16>:53 [#uses=0]
+ bitcast i32 0 to i32 ; <i32>:54 [#uses=0]
+ sext i32 0 to i64 ; <i64>:55 [#uses=0]
+ sext i32 0 to i64 ; <i64>:56 [#uses=0]
+ sitofp i32 0 to float ; <float>:57 [#uses=0]
+ sitofp i32 0 to double ; <double>:58 [#uses=0]
+ icmp ne i32 6, 0 ; <i1>:59 [#uses=0]
+ trunc i32 7 to i8 ; <i8>:60 [#uses=0]
+ trunc i32 8 to i8 ; <i8>:61 [#uses=0]
+ trunc i32 9 to i16 ; <i16>:62 [#uses=0]
+ bitcast i32 10 to i32 ; <i32>:63 [#uses=0]
+ zext i32 0 to i64 ; <i64>:64 [#uses=0]
+ zext i32 0 to i64 ; <i64>:65 [#uses=0]
+ uitofp i32 0 to float ; <float>:66 [#uses=0]
+ uitofp i32 0 to double ; <double>:67 [#uses=0]
+ icmp ne i64 0, 0 ; <i1>:68 [#uses=0]
+ trunc i64 0 to i8 ; <i8>:69 [#uses=0]
+ trunc i64 0 to i8 ; <i8>:70 [#uses=0]
+ trunc i64 0 to i16 ; <i16>:71 [#uses=0]
+ trunc i64 0 to i16 ; <i16>:72 [#uses=0]
+ trunc i64 0 to i32 ; <i32>:73 [#uses=0]
+ trunc i64 0 to i32 ; <i32>:74 [#uses=0]
+ bitcast i64 0 to i64 ; <i64>:75 [#uses=0]
+ bitcast i64 0 to i64 ; <i64>:76 [#uses=0]
+ sitofp i64 0 to float ; <float>:77 [#uses=0]
+ sitofp i64 0 to double ; <double>:78 [#uses=0]
+ icmp ne i64 1, 0 ; <i1>:79 [#uses=0]
+ trunc i64 1 to i8 ; <i8>:80 [#uses=0]
+ trunc i64 1 to i8 ; <i8>:81 [#uses=0]
+ trunc i64 1 to i16 ; <i16>:82 [#uses=0]
+ trunc i64 1 to i16 ; <i16>:83 [#uses=0]
+ trunc i64 1 to i32 ; <i32>:84 [#uses=0]
+ trunc i64 1 to i32 ; <i32>:85 [#uses=0]
+ bitcast i64 1 to i64 ; <i64>:86 [#uses=0]
+ bitcast i64 1 to i64 ; <i64>:87 [#uses=0]
+ uitofp i64 1 to float ; <float>:88 [#uses=0]
+ uitofp i64 0 to double ; <double>:89 [#uses=0]
+ bitcast float 0.000000e+00 to float ; <float>:90 [#uses=0]
+ fpext float 0.000000e+00 to double ; <double>:91 [#uses=0]
+ fptosi double 0.000000e+00 to i8 ; <i8>:92 [#uses=0]
+ fptoui double 0.000000e+00 to i8 ; <i8>:93 [#uses=0]
+ fptosi double 0.000000e+00 to i16 ; <i16>:94 [#uses=0]
+ fptoui double 0.000000e+00 to i16 ; <i16>:95 [#uses=0]
+ fptosi double 0.000000e+00 to i32 ; <i32>:96 [#uses=0]
+ fptoui double 0.000000e+00 to i32 ; <i32>:97 [#uses=0]
+ fptosi double 0.000000e+00 to i64 ; <i64>:98 [#uses=0]
+ fptrunc double 0.000000e+00 to float ; <float>:99 [#uses=0]
+ bitcast double 0.000000e+00 to double ; <double>:100 [#uses=0]
+ ret i32 0
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit -O0 %s
+
+; This test checks that common symbols have been allocated addresses honouring
+; the alignment requirement.
+
+@CS1 = common global i32 0, align 16
+@CS2 = common global i8 0, align 1
+@CS3 = common global i32 0, align 16
+
+define i32 @main() nounwind {
+entry:
+ %retval = alloca i32, align 4
+ %ptr = alloca i32, align 4
+ store i32 0, i32* %retval
+ store i32 ptrtoint (i32* @CS3 to i32), i32* %ptr, align 4
+ %0 = load i32* %ptr, align 4
+ %and = and i32 %0, 15
+ %tobool = icmp ne i32 %and, 0
+ br i1 %tobool, label %if.then, label %if.else
+
+if.then: ; preds = %entry
+ store i32 1, i32* %retval
+ br label %return
+
+if.else: ; preds = %entry
+ store i32 0, i32* %retval
+ br label %return
+
+return: ; preds = %if.else, %if.then
+ %1 = load i32* %retval
+ ret i32 %1
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit -O0 -disable-lazy-compilation=false %s
+
+; The intention of this test is to verify that symbols mapped to COMMON in ELF
+; work as expected.
+;
+; Compiled from this C code:
+;
+; int zero_int;
+; double zero_double;
+; int zero_arr[10];
+;
+; int main()
+; {
+; zero_arr[zero_int + 5] = 40;
+;
+; if (zero_double < 1.0)
+; zero_arr[zero_int + 2] = 70;
+;
+; for (int i = 1; i < 10; ++i) {
+; zero_arr[i] = zero_arr[i - 1] + zero_arr[i];
+; }
+; return zero_arr[9] == 110 ? 0 : -1;
+; }
+
+@zero_int = common global i32 0, align 4
+@zero_arr = common global [10 x i32] zeroinitializer, align 16
+@zero_double = common global double 0.000000e+00, align 8
+
+define i32 @main() nounwind {
+entry:
+ %retval = alloca i32, align 4
+ %i = alloca i32, align 4
+ store i32 0, i32* %retval
+ %0 = load i32* @zero_int, align 4
+ %add = add nsw i32 %0, 5
+ %idxprom = sext i32 %add to i64
+ %arrayidx = getelementptr inbounds [10 x i32]* @zero_arr, i32 0, i64 %idxprom
+ store i32 40, i32* %arrayidx, align 4
+ %1 = load double* @zero_double, align 8
+ %cmp = fcmp olt double %1, 1.000000e+00
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ %2 = load i32* @zero_int, align 4
+ %add1 = add nsw i32 %2, 2
+ %idxprom2 = sext i32 %add1 to i64
+ %arrayidx3 = getelementptr inbounds [10 x i32]* @zero_arr, i32 0, i64 %idxprom2
+ store i32 70, i32* %arrayidx3, align 4
+ br label %if.end
+
+if.end: ; preds = %if.then, %entry
+ store i32 1, i32* %i, align 4
+ br label %for.cond
+
+for.cond: ; preds = %for.inc, %if.end
+ %3 = load i32* %i, align 4
+ %cmp4 = icmp slt i32 %3, 10
+ br i1 %cmp4, label %for.body, label %for.end
+
+for.body: ; preds = %for.cond
+ %4 = load i32* %i, align 4
+ %sub = sub nsw i32 %4, 1
+ %idxprom5 = sext i32 %sub to i64
+ %arrayidx6 = getelementptr inbounds [10 x i32]* @zero_arr, i32 0, i64 %idxprom5
+ %5 = load i32* %arrayidx6, align 4
+ %6 = load i32* %i, align 4
+ %idxprom7 = sext i32 %6 to i64
+ %arrayidx8 = getelementptr inbounds [10 x i32]* @zero_arr, i32 0, i64 %idxprom7
+ %7 = load i32* %arrayidx8, align 4
+ %add9 = add nsw i32 %5, %7
+ %8 = load i32* %i, align 4
+ %idxprom10 = sext i32 %8 to i64
+ %arrayidx11 = getelementptr inbounds [10 x i32]* @zero_arr, i32 0, i64 %idxprom10
+ store i32 %add9, i32* %arrayidx11, align 4
+ br label %for.inc
+
+for.inc: ; preds = %for.body
+ %9 = load i32* %i, align 4
+ %inc = add nsw i32 %9, 1
+ store i32 %inc, i32* %i, align 4
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ %10 = load i32* getelementptr inbounds ([10 x i32]* @zero_arr, i32 0, i64 9), align 4
+ %cmp12 = icmp eq i32 %10, 110
+ %cond = select i1 %cmp12, i32 0, i32 -1
+ ret i32 %cond
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+; This tests to make sure that we can evaluate weird constant expressions
+
+@A = global i32 5 ; <i32*> [#uses=1]
+@B = global i32 6 ; <i32*> [#uses=1]
+
+define i32 @main() {
+ %A = or i1 false, icmp slt (i32* @A, i32* @B) ; <i1> [#uses=0]
+ ret i32 0
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit -O0 %s
+
+; Check that a variable is always aligned as specified.
+
+@var = global i32 0, align 32
+define i32 @main() {
+ %addr = ptrtoint i32* @var to i64
+ %mask = and i64 %addr, 31
+ %tst = icmp eq i64 %mask, 0
+ br i1 %tst, label %good, label %bad
+good:
+ ret i32 0
+bad:
+ ret i32 1
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define double @test(double* %DP, double %Arg) {
+ %D = load double* %DP ; <double> [#uses=1]
+ %V = fadd double %D, 1.000000e+00 ; <double> [#uses=2]
+ %W = fsub double %V, %V ; <double> [#uses=3]
+ %X = fmul double %W, %W ; <double> [#uses=2]
+ %Y = fdiv double %X, %X ; <double> [#uses=2]
+ %Q = fadd double %Y, %Arg ; <double> [#uses=1]
+ %R = bitcast double %Q to double ; <double> [#uses=1]
+ store double %Q, double* %DP
+ ret double %Y
+}
+
+define i32 @main() {
+ %X = alloca double ; <double*> [#uses=2]
+ store double 0.000000e+00, double* %X
+ call double @test( double* %X, double 2.000000e+00 ) ; <double>:1 [#uses=0]
+ ret i32 0
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define double @test(double* %DP, double %Arg) {
+ %D = load double* %DP ; <double> [#uses=1]
+ %V = fadd double %D, 1.000000e+00 ; <double> [#uses=2]
+ %W = fsub double %V, %V ; <double> [#uses=3]
+ %X = fmul double %W, %W ; <double> [#uses=2]
+ %Y = fdiv double %X, %X ; <double> [#uses=2]
+ %Z = frem double %Y, %Y ; <double> [#uses=3]
+ %Z1 = fdiv double %Z, %W ; <double> [#uses=0]
+ %Q = fadd double %Z, %Arg ; <double> [#uses=1]
+ %R = bitcast double %Q to double ; <double> [#uses=1]
+ store double %R, double* %DP
+ ret double %Z
+}
+
+define i32 @main() {
+ %X = alloca double ; <double*> [#uses=2]
+ store double 0.000000e+00, double* %X
+ call double @test( double* %X, double 2.000000e+00 ) ; <double>:1 [#uses=0]
+ ret i32 0
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+; XFAIL: darwin
+@var = global i32 1, align 4
+@llvm.global_ctors = appending global [1 x { i32, void ()* }] [{ i32, void ()* } { i32 65535, void ()* @ctor_func }]
+@llvm.global_dtors = appending global [1 x { i32, void ()* }] [{ i32, void ()* } { i32 65535, void ()* @dtor_func }]
+
+define i32 @main() nounwind {
+entry:
+ %0 = load i32* @var, align 4
+ ret i32 %0
+}
+
+define internal void @ctor_func() section ".text.startup" {
+entry:
+ store i32 0, i32* @var, align 4
+ ret void
+}
+
+define internal void @dtor_func() section ".text.startup" {
+entry:
+ ret void
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit -relocation-model=pic -code-model=small %s > /dev/null
+; XFAIL: mips, aarch64, arm, i686, i386
+
+@count = global i32 1, align 4
+
+define i32 @main() nounwind uwtable {
+entry:
+ %retval = alloca i32, align 4
+ %i = alloca i32, align 4
+ store i32 0, i32* %retval
+ store i32 0, i32* %i, align 4
+ br label %for.cond
+
+for.cond: ; preds = %for.inc, %entry
+ %0 = load i32* %i, align 4
+ %cmp = icmp slt i32 %0, 49
+ br i1 %cmp, label %for.body, label %for.end
+
+for.body: ; preds = %for.cond
+ %1 = load i32* @count, align 4
+ %inc = add nsw i32 %1, 1
+ store i32 %inc, i32* @count, align 4
+ br label %for.inc
+
+for.inc: ; preds = %for.body
+ %2 = load i32* %i, align 4
+ %inc1 = add nsw i32 %2, 1
+ store i32 %inc1, i32* %i, align 4
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ %3 = load i32* @count, align 4
+ %sub = sub nsw i32 %3, 50
+ ret i32 %sub
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+@count = global i32 1, align 4
+
+define i32 @main() nounwind uwtable {
+entry:
+ %retval = alloca i32, align 4
+ %i = alloca i32, align 4
+ store i32 0, i32* %retval
+ store i32 0, i32* %i, align 4
+ br label %for.cond
+
+for.cond: ; preds = %for.inc, %entry
+ %0 = load i32* %i, align 4
+ %cmp = icmp slt i32 %0, 49
+ br i1 %cmp, label %for.body, label %for.end
+
+for.body: ; preds = %for.cond
+ %1 = load i32* @count, align 4
+ %inc = add nsw i32 %1, 1
+ store i32 %inc, i32* @count, align 4
+ br label %for.inc
+
+for.inc: ; preds = %for.body
+ %2 = load i32* %i, align 4
+ %inc1 = add nsw i32 %2, 1
+ store i32 %inc1, i32* %i, align 4
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ %3 = load i32* @count, align 4
+ %sub = sub nsw i32 %3, 50
+ ret i32 %sub
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+@count = global i32 0, align 4
+
+define i32 @main() nounwind uwtable {
+entry:
+ %retval = alloca i32, align 4
+ %i = alloca i32, align 4
+ store i32 0, i32* %retval
+ store i32 0, i32* %i, align 4
+ br label %for.cond
+
+for.cond: ; preds = %for.inc, %entry
+ %0 = load i32* %i, align 4
+ %cmp = icmp slt i32 %0, 50
+ br i1 %cmp, label %for.body, label %for.end
+
+for.body: ; preds = %for.cond
+ %1 = load i32* @count, align 4
+ %inc = add nsw i32 %1, 1
+ store i32 %inc, i32* @count, align 4
+ br label %for.inc
+
+for.inc: ; preds = %for.body
+ %2 = load i32* %i, align 4
+ %inc1 = add nsw i32 %2, 1
+ store i32 %inc1, i32* %i, align 4
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ %3 = load i32* @count, align 4
+ %sub = sub nsw i32 %3, 50
+ ret i32 %sub
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define void @test(i8* %P, i16* %P.upgrd.1, i32* %P.upgrd.2, i64* %P.upgrd.3) {
+ %V = load i8* %P ; <i8> [#uses=1]
+ store i8 %V, i8* %P
+ %V.upgrd.4 = load i16* %P.upgrd.1 ; <i16> [#uses=1]
+ store i16 %V.upgrd.4, i16* %P.upgrd.1
+ %V.upgrd.5 = load i32* %P.upgrd.2 ; <i32> [#uses=1]
+ store i32 %V.upgrd.5, i32* %P.upgrd.2
+ %V.upgrd.6 = load i64* %P.upgrd.3 ; <i64> [#uses=1]
+ store i64 %V.upgrd.6, i64* %P.upgrd.3
+ ret void
+}
+
+define i32 @varalloca(i32 %Size) {
+ ;; Variable sized alloca
+ %X = alloca i32, i32 %Size ; <i32*> [#uses=2]
+ store i32 %Size, i32* %X
+ %Y = load i32* %X ; <i32> [#uses=1]
+ ret i32 %Y
+}
+
+define i32 @main() {
+ %A = alloca i8 ; <i8*> [#uses=1]
+ %B = alloca i16 ; <i16*> [#uses=1]
+ %C = alloca i32 ; <i32*> [#uses=1]
+ %D = alloca i64 ; <i64*> [#uses=1]
+ call void @test( i8* %A, i16* %B, i32* %C, i64* %D )
+ call i32 @varalloca( i32 7 ) ; <i32>:1 [#uses=0]
+ ret i32 0
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @main() nounwind uwtable {
+entry:
+ %retval = alloca i32, align 4
+ %count = alloca i32, align 4
+ %i = alloca i32, align 4
+ store i32 0, i32* %retval
+ store i32 0, i32* %count, align 4
+ store i32 0, i32* %i, align 4
+ br label %for.cond
+
+for.cond: ; preds = %for.inc, %entry
+ %0 = load i32* %i, align 4
+ %cmp = icmp slt i32 %0, 50
+ br i1 %cmp, label %for.body, label %for.end
+
+for.body: ; preds = %for.cond
+ %1 = load i32* %count, align 4
+ %inc = add nsw i32 %1, 1
+ store i32 %inc, i32* %count, align 4
+ br label %for.inc
+
+for.inc: ; preds = %for.body
+ %2 = load i32* %i, align 4
+ %inc1 = add nsw i32 %2, 1
+ store i32 %inc1, i32* %i, align 4
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ %3 = load i32* %count, align 4
+ %sub = sub nsw i32 %3, 50
+ ret i32 %sub
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @main() {
+ %A = and i8 4, 8 ; <i8> [#uses=2]
+ %B = or i8 %A, 7 ; <i8> [#uses=1]
+ %C = xor i8 %B, %A ; <i8> [#uses=0]
+ %A.upgrd.1 = and i16 4, 8 ; <i16> [#uses=2]
+ %B.upgrd.2 = or i16 %A.upgrd.1, 7 ; <i16> [#uses=1]
+ %C.upgrd.3 = xor i16 %B.upgrd.2, %A.upgrd.1 ; <i16> [#uses=0]
+ %A.upgrd.4 = and i32 4, 8 ; <i32> [#uses=2]
+ %B.upgrd.5 = or i32 %A.upgrd.4, 7 ; <i32> [#uses=1]
+ %C.upgrd.6 = xor i32 %B.upgrd.5, %A.upgrd.4 ; <i32> [#uses=0]
+ %A.upgrd.7 = and i64 4, 8 ; <i64> [#uses=2]
+ %B.upgrd.8 = or i64 %A.upgrd.7, 7 ; <i64> [#uses=1]
+ %C.upgrd.9 = xor i64 %B.upgrd.8, %A.upgrd.7 ; <i64> [#uses=0]
+ ret i32 0
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @main() {
+; <label>:0
+ br label %Loop
+Loop: ; preds = %Loop, %0
+ %I = phi i32 [ 0, %0 ], [ %i2, %Loop ] ; <i32> [#uses=1]
+ %i2 = add i32 %I, 1 ; <i32> [#uses=2]
+ %C = icmp eq i32 %i2, 10 ; <i1> [#uses=1]
+ br i1 %C, label %Out, label %Loop
+Out: ; preds = %Loop
+ ret i32 0
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+; test phi node
+@Y = global i32 6 ; <i32*> [#uses=1]
+
+define void @blah(i32* %X) {
+; <label>:0
+ br label %T
+T: ; preds = %Dead, %0
+ phi i32* [ %X, %0 ], [ @Y, %Dead ] ; <i32*>:1 [#uses=0]
+ ret void
+Dead: ; No predecessors!
+ br label %T
+}
+
+define i32 @test(i1 %C) {
+; <label>:0
+ br i1 %C, label %T, label %T
+T: ; preds = %0, %0
+ %X = phi i32 [ 123, %0 ], [ 123, %0 ] ; <i32> [#uses=1]
+ ret i32 %X
+}
+
+define i32 @main() {
+; <label>:0
+ br label %Test
+Test: ; preds = %Dead, %0
+ %X = phi i32 [ 0, %0 ], [ %Y, %Dead ] ; <i32> [#uses=1]
+ ret i32 %X
+Dead: ; No predecessors!
+ %Y = ashr i32 12, 4 ; <i32> [#uses=1]
+ br label %Test
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit -O0 -relocation-model=pic -code-model=small %s
+; XFAIL: mips, aarch64, arm, i686, i386
+
+@.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
+@ptr = global i8* getelementptr inbounds ([6 x i8]* @.str, i32 0, i32 0), align 4
+@.str1 = private unnamed_addr constant [6 x i8] c"data2\00", align 1
+@ptr2 = global i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0), align 4
+
+define i32 @main(i32 %argc, i8** nocapture %argv) nounwind readonly {
+entry:
+ %0 = load i8** @ptr, align 4
+ %1 = load i8** @ptr2, align 4
+ %cmp = icmp eq i8* %0, %1
+ %. = zext i1 %cmp to i32
+ ret i32 %.
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit -O0 %s
+
+@.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
+@ptr = global i8* getelementptr inbounds ([6 x i8]* @.str, i32 0, i32 0), align 4
+@.str1 = private unnamed_addr constant [6 x i8] c"data2\00", align 1
+@ptr2 = global i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0), align 4
+
+define i32 @main(i32 %argc, i8** nocapture %argv) nounwind readonly {
+entry:
+ %0 = load i8** @ptr, align 4
+ %1 = load i8** @ptr2, align 4
+ %cmp = icmp eq i8* %0, %1
+ %. = zext i1 %cmp to i32
+ ret i32 %.
+}
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+; test return instructions
+define void @test1() {
+ ret void
+}
+
+define i8 @test2() {
+ ret i8 1
+}
+
+define i8 @test3() {
+ ret i8 1
+}
+
+define i16 @test4() {
+ ret i16 -1
+}
+
+define i16 @test5() {
+ ret i16 -1
+}
+
+define i32 @main() {
+ ret i32 0
+}
+
+define i32 @test6() {
+ ret i32 4
+}
+
+define i64 @test7() {
+ ret i64 0
+}
+
+define i64 @test8() {
+ ret i64 0
+}
+
+define float @test9() {
+ ret float 1.000000e+00
+}
+
+define double @test10() {
+ ret double 2.000000e+00
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @main() nounwind uwtable {
+entry:
+ %retval = alloca i32, align 4
+ store i32 0, i32* %retval
+ ret i32 0
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+
+define i32 @main() {
+ %double1 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=6]
+ %double2 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=6]
+ %float1 = fadd float 0.000000e+00, 0.000000e+00 ; <float> [#uses=6]
+ %float2 = fadd float 0.000000e+00, 0.000000e+00 ; <float> [#uses=6]
+ %test49 = fcmp oeq float %float1, %float2 ; <i1> [#uses=0]
+ %test50 = fcmp oge float %float1, %float2 ; <i1> [#uses=0]
+ %test51 = fcmp ogt float %float1, %float2 ; <i1> [#uses=0]
+ %test52 = fcmp ole float %float1, %float2 ; <i1> [#uses=0]
+ %test53 = fcmp olt float %float1, %float2 ; <i1> [#uses=0]
+ %test54 = fcmp une float %float1, %float2 ; <i1> [#uses=0]
+ %test55 = fcmp oeq double %double1, %double2 ; <i1> [#uses=0]
+ %test56 = fcmp oge double %double1, %double2 ; <i1> [#uses=0]
+ %test57 = fcmp ogt double %double1, %double2 ; <i1> [#uses=0]
+ %test58 = fcmp ole double %double1, %double2 ; <i1> [#uses=0]
+ %test59 = fcmp olt double %double1, %double2 ; <i1> [#uses=0]
+ %test60 = fcmp une double %double1, %double2 ; <i1> [#uses=0]
+ ret i32 0
+}
+
+
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @main() {
+ %int1 = add i32 0, 0 ; <i32> [#uses=6]
+ %int2 = add i32 0, 0 ; <i32> [#uses=6]
+ %long1 = add i64 0, 0 ; <i64> [#uses=6]
+ %long2 = add i64 0, 0 ; <i64> [#uses=6]
+ %sbyte1 = add i8 0, 0 ; <i8> [#uses=6]
+ %sbyte2 = add i8 0, 0 ; <i8> [#uses=6]
+ %short1 = add i16 0, 0 ; <i16> [#uses=6]
+ %short2 = add i16 0, 0 ; <i16> [#uses=6]
+ %ubyte1 = add i8 0, 0 ; <i8> [#uses=6]
+ %ubyte2 = add i8 0, 0 ; <i8> [#uses=6]
+ %uint1 = add i32 0, 0 ; <i32> [#uses=6]
+ %uint2 = add i32 0, 0 ; <i32> [#uses=6]
+ %ulong1 = add i64 0, 0 ; <i64> [#uses=6]
+ %ulong2 = add i64 0, 0 ; <i64> [#uses=6]
+ %ushort1 = add i16 0, 0 ; <i16> [#uses=6]
+ %ushort2 = add i16 0, 0 ; <i16> [#uses=6]
+ %test1 = icmp eq i8 %ubyte1, %ubyte2 ; <i1> [#uses=0]
+ %test2 = icmp uge i8 %ubyte1, %ubyte2 ; <i1> [#uses=0]
+ %test3 = icmp ugt i8 %ubyte1, %ubyte2 ; <i1> [#uses=0]
+ %test4 = icmp ule i8 %ubyte1, %ubyte2 ; <i1> [#uses=0]
+ %test5 = icmp ult i8 %ubyte1, %ubyte2 ; <i1> [#uses=0]
+ %test6 = icmp ne i8 %ubyte1, %ubyte2 ; <i1> [#uses=0]
+ %test7 = icmp eq i16 %ushort1, %ushort2 ; <i1> [#uses=0]
+ %test8 = icmp uge i16 %ushort1, %ushort2 ; <i1> [#uses=0]
+ %test9 = icmp ugt i16 %ushort1, %ushort2 ; <i1> [#uses=0]
+ %test10 = icmp ule i16 %ushort1, %ushort2 ; <i1> [#uses=0]
+ %test11 = icmp ult i16 %ushort1, %ushort2 ; <i1> [#uses=0]
+ %test12 = icmp ne i16 %ushort1, %ushort2 ; <i1> [#uses=0]
+ %test13 = icmp eq i32 %uint1, %uint2 ; <i1> [#uses=0]
+ %test14 = icmp uge i32 %uint1, %uint2 ; <i1> [#uses=0]
+ %test15 = icmp ugt i32 %uint1, %uint2 ; <i1> [#uses=0]
+ %test16 = icmp ule i32 %uint1, %uint2 ; <i1> [#uses=0]
+ %test17 = icmp ult i32 %uint1, %uint2 ; <i1> [#uses=0]
+ %test18 = icmp ne i32 %uint1, %uint2 ; <i1> [#uses=0]
+ %test19 = icmp eq i64 %ulong1, %ulong2 ; <i1> [#uses=0]
+ %test20 = icmp uge i64 %ulong1, %ulong2 ; <i1> [#uses=0]
+ %test21 = icmp ugt i64 %ulong1, %ulong2 ; <i1> [#uses=0]
+ %test22 = icmp ule i64 %ulong1, %ulong2 ; <i1> [#uses=0]
+ %test23 = icmp ult i64 %ulong1, %ulong2 ; <i1> [#uses=0]
+ %test24 = icmp ne i64 %ulong1, %ulong2 ; <i1> [#uses=0]
+ %test25 = icmp eq i8 %sbyte1, %sbyte2 ; <i1> [#uses=0]
+ %test26 = icmp sge i8 %sbyte1, %sbyte2 ; <i1> [#uses=0]
+ %test27 = icmp sgt i8 %sbyte1, %sbyte2 ; <i1> [#uses=0]
+ %test28 = icmp sle i8 %sbyte1, %sbyte2 ; <i1> [#uses=0]
+ %test29 = icmp slt i8 %sbyte1, %sbyte2 ; <i1> [#uses=0]
+ %test30 = icmp ne i8 %sbyte1, %sbyte2 ; <i1> [#uses=0]
+ %test31 = icmp eq i16 %short1, %short2 ; <i1> [#uses=0]
+ %test32 = icmp sge i16 %short1, %short2 ; <i1> [#uses=0]
+ %test33 = icmp sgt i16 %short1, %short2 ; <i1> [#uses=0]
+ %test34 = icmp sle i16 %short1, %short2 ; <i1> [#uses=0]
+ %test35 = icmp slt i16 %short1, %short2 ; <i1> [#uses=0]
+ %test36 = icmp ne i16 %short1, %short2 ; <i1> [#uses=0]
+ %test37 = icmp eq i32 %int1, %int2 ; <i1> [#uses=0]
+ %test38 = icmp sge i32 %int1, %int2 ; <i1> [#uses=0]
+ %test39 = icmp sgt i32 %int1, %int2 ; <i1> [#uses=0]
+ %test40 = icmp sle i32 %int1, %int2 ; <i1> [#uses=0]
+ %test41 = icmp slt i32 %int1, %int2 ; <i1> [#uses=0]
+ %test42 = icmp ne i32 %int1, %int2 ; <i1> [#uses=0]
+ %test43 = icmp eq i64 %long1, %long2 ; <i1> [#uses=0]
+ %test44 = icmp sge i64 %long1, %long2 ; <i1> [#uses=0]
+ %test45 = icmp sgt i64 %long1, %long2 ; <i1> [#uses=0]
+ %test46 = icmp sle i64 %long1, %long2 ; <i1> [#uses=0]
+ %test47 = icmp slt i64 %long1, %long2 ; <i1> [#uses=0]
+ %test48 = icmp ne i64 %long1, %long2 ; <i1> [#uses=0]
+ ret i32 0
+}
--- /dev/null
+; RUN: %lli -use-orcmcjit %s > /dev/null
+
+define i32 @main() {
+ %shamt = add i8 0, 1 ; <i8> [#uses=8]
+ %shift.upgrd.1 = zext i8 %shamt to i32 ; <i32> [#uses=1]
+ %t1.s = shl i32 1, %shift.upgrd.1 ; <i32> [#uses=0]
+ %t2.s = shl i32 1, 4 ; <i32> [#uses=0]
+ %shift.upgrd.2 = zext i8 %shamt to i32 ; <i32> [#uses=1]
+ %t1 = shl i32 1, %shift.upgrd.2 ; <i32> [#uses=0]
+ %t2 = shl i32 1, 5 ; <i32> [#uses=0]
+ %t2.s.upgrd.3 = shl i64 1, 4 ; <i64> [#uses=0]
+ %t2.upgrd.4 = shl i64 1, 5 ; <i64> [#uses=0]
+ %shift.upgrd.5 = zext i8 %shamt to i32 ; <i32> [#uses=1]
+ %tr1.s = ashr i32 1, %shift.upgrd.5 ; <i32> [#uses=0]
+ %tr2.s = ashr i32 1, 4 ; <i32> [#uses=0]
+ %shift.upgrd.6 = zext i8 %shamt to i32 ; <i32> [#uses=1]
+ %tr1 = lshr i32 1, %shift.upgrd.6 ; <i32> [#uses=0]
+ %tr2 = lshr i32 1, 5 ; <i32> [#uses=0]
+ %tr1.l = ashr i64 1, 4 ; <i64> [#uses=0]
+ %shift.upgrd.7 = zext i8 %shamt to i64 ; <i64> [#uses=1]
+ %tr2.l = ashr i64 1, %shift.upgrd.7 ; <i64> [#uses=0]
+ %tr3.l = shl i64 1, 4 ; <i64> [#uses=0]
+ %shift.upgrd.8 = zext i8 %shamt to i64 ; <i64> [#uses=1]
+ %tr4.l = shl i64 1, %shift.upgrd.8 ; <i64> [#uses=0]
+ %tr1.u = lshr i64 1, 5 ; <i64> [#uses=0]
+ %shift.upgrd.9 = zext i8 %shamt to i64 ; <i64> [#uses=1]
+ %tr2.u = lshr i64 1, %shift.upgrd.9 ; <i64> [#uses=0]
+ %tr3.u = shl i64 1, 5 ; <i64> [#uses=0]
+ %shift.upgrd.10 = zext i8 %shamt to i64 ; <i64> [#uses=1]
+ %tr4.u = shl i64 1, %shift.upgrd.10 ; <i64> [#uses=0]
+ ret i32 0
+}
projects / oota-llvm.git / commitdiff