}
def postidx_reg : Operand<i32> {
let EncoderMethod = "getPostIdxRegOpValue";
- let PrintMethod = "printAddrMode3OffsetOperand";
+ let PrintMethod = "printPostIdxRegOperand";
let ParserMatchClass = PostIdxRegAsmOperand;
let MIOperandInfo = (ops GPR, i32imm);
}
O << '#' << ((Imm & 256) ? "" : "-") << (Imm & 0xff);
}
+void ARMInstPrinter::printPostIdxRegOperand(const MCInst *MI, unsigned OpNum,
+ raw_ostream &O) {
+ const MCOperand &MO1 = MI->getOperand(OpNum);
+ const MCOperand &MO2 = MI->getOperand(OpNum+1);
+
+ O << getAddrOpcStr(ARM_AM::getAM3Op(MO2.getImm()))
+ << getRegisterName(MO1.getReg());
+}
+
void ARMInstPrinter::printPostIdxImm8s4Operand(const MCInst *MI,
unsigned OpNum,
raw_ostream &O) {
void printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,raw_ostream &O);
void printPostIdxImm8Operand(const MCInst *MI, unsigned OpNum,
raw_ostream &O);
+ void printPostIdxRegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printPostIdxImm8s4Operand(const MCInst *MI, unsigned OpNum,
raw_ostream &O);