I forgot that we always spill fp values as 64-bits. Implement spill folding

for FP as well.  This triggers a couple dozen times on 177.mesa (for example).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23299 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 1ccc85990150c90a9f2857d58cc3ecd43b9b268b..6d564b9ba415fd35d919a547d7f2a825ba96da7c 100644 (file)
--- a/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -149,14 +149,21 @@ MachineInstr *PPC32RegisterInfo::foldMemoryOperand(MachineInstr *MI,
       unsigned InReg = MI->getOperand(1).getReg();
       return addFrameReference(BuildMI(PPC::STW,
                                        3).addReg(InReg), FrameIndex);
-    } else {
+    } else {           // move -> load
       unsigned OutReg = MI->getOperand(0).getReg();
       return addFrameReference(BuildMI(PPC::LWZ, 2, OutReg), FrameIndex);
     }
     
   } else if (Opc == PPC::FMR) {
-    // FIXME: We would be able to fold this, but we don't know whether to use a
-    // 32- or 64-bit load/store :(.
+    // We currently always spill FP values as doubles.  :(
+    if (OpNum == 0) {  // move -> store
+      unsigned InReg = MI->getOperand(1).getReg();
+      return addFrameReference(BuildMI(PPC::STFD,
+                                       3).addReg(InReg), FrameIndex);
+    } else {           // move -> load
+      unsigned OutReg = MI->getOperand(0).getReg();
+      return addFrameReference(BuildMI(PPC::LFD, 2, OutReg), FrameIndex);
+    }
   }
   return 0;
 }