Add tests for NEON encoding of vqdmlsl.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117173 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/MC/ARM/neon-mul-accum-encoding.ll b/test/MC/ARM/neon-mul-accum-encoding.ll
index 2e2fe96cd9eedc85a378656b195850654ffdc76d..3543a42fa2d28f9f3166f5a1424f060cf80c9da3 100644 (file)
--- a/test/MC/ARM/neon-mul-accum-encoding.ll
+++ b/test/MC/ARM/neon-mul-accum-encoding.ll
@@ -354,3 +354,26 @@ define <2 x i64> @vmlslu_2xi32(<2 x i64>* %A, <2 x i32>* %B, <2 x i32>* %C) noun
        %tmp7 = sub <2 x i64> %tmp1, %tmp6
        ret <2 x i64> %tmp7
 }
+
+declare <4 x i32>  @llvm.arm.neon.vqdmlsl.v4i32(<4 x i32>, <4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i64>  @llvm.arm.neon.vqdmlsl.v2i64(<2 x i64>, <2 x i32>, <2 x i32>) nounwind readnone
+
+; CHECK: vqdmlsl_4xi16
+define <4 x i32> @vqdmlsl_4xi16(<4 x i32>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind {
+       %tmp1 = load <4 x i32>* %A
+       %tmp2 = load <4 x i16>* %B
+       %tmp3 = load <4 x i16>* %C
+; CHECK: vqdmlsl.s16   q8, d19, d18    @ encoding: [0xa2,0x0b,0xd3,0xf2]
+       %tmp4 = call <4 x i32> @llvm.arm.neon.vqdmlsl.v4i32(<4 x i32> %tmp1, <4 x i16> %tmp2, <4 x i16> %tmp3)
+       ret <4 x i32> %tmp4
+}
+
+; CHECK: vqdmlsl_2xi32
+define <2 x i64> @vqdmlsl_2xi32(<2 x i64>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind {
+       %tmp1 = load <2 x i64>* %A
+       %tmp2 = load <2 x i32>* %B
+       %tmp3 = load <2 x i32>* %C
+; CHECK: vqdmlsl.s32   q8, d19, d18    @ encoding: [0xa2,0x0b,0xe3,0xf2]
+       %tmp4 = call <2 x i64> @llvm.arm.neon.vqdmlsl.v2i64(<2 x i64> %tmp1, <2 x i32> %tmp2, <2 x i32> %tmp3)
+       ret <2 x i64> %tmp4
+}