tBcc is OK to be predicated in Thumb2 outside of IT blocks (obviously).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138873 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 67176ad5a3798cd8c895b4b51859763fd27ef792..274e14db9c0727b6e7e8e678b6edaba323d9e68d 100644 (file)
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -3337,10 +3337,10 @@ validateInstruction(MCInst &Inst,
                    "', but expected '" +
                    ARMCondCodeToString(ARMCC::CondCodes(ITCond)) + "'");
     }
-    // Check for non-'al' condition codes outside of the IT block.
+  // Check for non-'al' condition codes outside of the IT block.
   } else if (isThumbTwo() && MCID.isPredicable() &&
              Inst.getOperand(MCID.findFirstPredOperandIdx()).getImm() !=
-             ARMCC::AL)
+             ARMCC::AL && Inst.getOpcode() != ARM::tBcc)
     return Error(Loc, "predicated instructions must be in IT block");
 
   switch (Inst.getOpcode()) {