Adjust setjmp instruction sequence to not need 32-bit alignment padding

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94627 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 1e52211521cce55695ae30eb8bb96ddd18bb4776..3c3f054bc85478ac8092d350242e8b9b1696a018 100644 (file)
--- a/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -470,7 +470,7 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
     case ARM::Int_eh_sjlj_setjmp:
       return 24;
     case ARM::tInt_eh_sjlj_setjmp:
-      return 22;
+      return 20;
     case ARM::t2Int_eh_sjlj_setjmp:
       return 22;
     case ARM::BR_JTr:

diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td
index 746caffe22ea1b767e4ed0e6baded1e2d6f64b51..a3a83ddd3f7927e8c9ed107a98b78bd3c9b79e59 100644 (file)
--- a/lib/Target/ARM/ARMInstrThumb.td
+++ b/lib/Target/ARM/ARMInstrThumb.td
@@ -820,14 +820,13 @@ let Defs =
                               "mov\tr12, r1\t@ begin eh.setjmp\n"
                               "\tmov\tr1, sp\n"
                               "\tstr\tr1, [$src, #8]\n"
-                              "\tadr\tr1, 0f\n"
-                              "\tadds\tr1, #1\n"
+                              "\tmov\tr1, pc\n"
+                              "\tadds\tr1, #9\n"
                               "\tstr\tr1, [$src, #4]\n"
                               "\tmov\tr1, r12\n"
                               "\tmovs\tr0, #0\n"
                               "\tb\t1f\n"
-                              ".align 2\n"
-                              "0:\tmovs\tr0, #1\t@ end eh.setjmp\n"
+                              "\tmovs\tr0, #1\t@ end eh.setjmp\n"
                               "1:", "",
                               [(set R0, (ARMeh_sjlj_setjmp GPR:$src))]>;
 }