Implement reading and writing of the ICmp and FCmp instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32149 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Bytecode/Reader/Reader.cpp b/lib/Bytecode/Reader/Reader.cpp
index 6a5a9ca88c306d8407cf017e49208e9592daf5a3..d294e9e025e4c3e0b82926191a7e8081ea194ed5 100644 (file)
--- a/lib/Bytecode/Reader/Reader.cpp
+++ b/lib/Bytecode/Reader/Reader.cpp
@@ -550,12 +550,11 @@ void BytecodeReader::ParseInstruction(std::vector<unsigned> &Oprnds,
 
   // First, handle the easy binary operators case
   if (Opcode >= Instruction::BinaryOpsBegin &&
-      Opcode <  Instruction::BinaryOpsEnd  && Oprnds.size() == 2)
+      Opcode <  Instruction::BinaryOpsEnd  && Oprnds.size() == 2) {
     Result = BinaryOperator::create(Instruction::BinaryOps(Opcode),
                                     getValue(iType, Oprnds[0]),
                                     getValue(iType, Oprnds[1]));
-
-  if (!Result) {
+  } else {
     // Indicate that we don't think this is a call instruction (yet).
     // Process based on the Opcode read
     switch (Opcode) {
@@ -700,6 +699,13 @@ void BytecodeReader::ParseInstruction(std::vector<unsigned> &Oprnds,
       Result = PN;
       break;
     }
+    case Instruction::ICmp:
+    case Instruction::FCmp:
+      // These instructions encode the comparison predicate as the 3rd operand.
+      Result = CmpInst::create(Instruction::OtherOps(Opcode),
+          static_cast<unsigned short>(Oprnds[2]),
+          getValue(iType, Oprnds[0]), getValue(iType, Oprnds[1]));
+      break;
     case Instruction::Shl:
     case Instruction::LShr:
     case Instruction::AShr:

diff --git a/lib/Bytecode/Writer/Writer.cpp b/lib/Bytecode/Writer/Writer.cpp
index d8bcce8208596cf1502aa2e0392e1f53bd90d205..9cf61c6ee21539aca0035088b24d4a95c1b7bd2e 100644 (file)
--- a/lib/Bytecode/Writer/Writer.cpp
+++ b/lib/Bytecode/Writer/Writer.cpp
@@ -718,6 +718,15 @@ void BytecodeWriter::outputInstruction(const Instruction &I) {
         if (Slots[1] > MaxOpSlot) MaxOpSlot = Slots[1];
         NumOperands = 2;
       }
+    } else if (isa<ICmpInst>(I) || isa<FCmpInst>(I)) {
+      // We need to encode the compare instruction's predicate as the third
+      // operand. Its not really a slot, but we don't want to break the 
+      // instruction format for these instructions.
+      NumOperands++;
+      assert(NumOperands == 3 && "CmpInst with wrong number of operands?");
+      Slots[2] = unsigned(cast<CmpInst>(&I)->getPredicate());
+      if (Slots[2] > MaxOpSlot)
+        MaxOpSlot = Slots[2];
     } else if (const GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(&I)) {
       // We need to encode the type of sequential type indices into their slot #
       unsigned Idx = 1;