eliminate more redundant constraint type analysis

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36546 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 43f5ab94d5a1930cc16321863e7dbde0b0d35134..1066d6c7c99bdcf0eadfb51c51f6c1e5e971ddf2 100644 (file)
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -3320,12 +3320,8 @@ void SelectionDAGLowering::visitInlineAsm(CallInst &I) {
 
     switch (OpInfo.Type) {
     case InlineAsm::isOutput: {
-      TargetLowering::ConstraintType CTy = TargetLowering::C_RegisterClass;
-      if (OpInfo.ConstraintCode.size() == 1)   // not a physreg name.
-        CTy = TLI.getConstraintType(OpInfo.ConstraintCode);
-      
-      if (CTy != TargetLowering::C_RegisterClass &&
-          CTy != TargetLowering::C_Register) {
+      if (OpInfo.ConstraintType != TargetLowering::C_RegisterClass &&
+          OpInfo.ConstraintType != TargetLowering::C_Register) {
         // Memory output, or 'other' output (e.g. 'X' constraint).
         SDOperand InOperandVal = OpInfo.CallOperand;