Add fabs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76023 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/SystemZ/SystemZInstrFP.td b/lib/Target/SystemZ/SystemZInstrFP.td
index ca9556dab6552b91f640cd75005f11931faefbfe..ffbb95003621b3fddf701fd66236b4b7dd61fea1 100644 (file)
--- a/lib/Target/SystemZ/SystemZInstrFP.td
+++ b/lib/Target/SystemZ/SystemZInstrFP.td
@@ -67,6 +67,15 @@ def FNEG64rr : Pseudo<(outs FP64:$dst), (ins FP64:$src),
                        "lcdbr\t{$dst}",
                        [(set FP64:$dst, (fneg FP64:$src))]>;
 
+// FIXME: Add peephole for fneg(fabs) => load negative
+
+def FABS32rr : Pseudo<(outs FP32:$dst), (ins FP32:$src),
+                       "lpebr\t{$dst}",
+                       [(set FP32:$dst, (fabs FP32:$src))]>;
+def FABS64rr : Pseudo<(outs FP64:$dst), (ins FP64:$src),
+                       "lpdbr\t{$dst}",
+                       [(set FP64:$dst, (fabs FP64:$src))]>;
+
 let isCommutable = 1 in { // X = ADD Y, Z  == X = ADD Z, Y
 def FADD32rr : Pseudo<(outs FP32:$dst), (ins FP32:$src1, FP32:$src2),
                        "aebr\t{$dst, $src2}",