rk3036:clk:modify mac clk freq div

diff --git a/arch/arm/boot/dts/rk3036-clocks.dtsi b/arch/arm/boot/dts/rk3036-clocks.dtsi
index a65969c7b449d5e578bf349299b73a2cd7bf0f03..41aab4620f0489e242f707d2cfd406d44406d853 100755 (executable)
--- a/arch/arm/boot/dts/rk3036-clocks.dtsi
+++ b/arch/arm/boot/dts/rk3036-clocks.dtsi
@@ -858,25 +858,25 @@
                                                #clock-init-cells = <1>;
                                        };
 
-                                       clk_mac_pll_div: clk_mac_pll_div {
+                                       clk_mac_ref_div: clk_mac_ref_div {
                                                compatible = "rockchip,rk3188-div-con";
                                                rockchip,bits = <4 5>;
-                                               clocks = <&clk_mac_pll>;
-                                               clock-output-names = "clk_mac_pll";
+                                               clocks = <&clk_mac_ref>;
+                                               clock-output-names = "clk_mac";
                                                rockchip,div-type = <CLK_DIVIDER_PLUS_ONE>;
                                                #clock-cells = <0>;
-                                               rockchip,clkops-idx =
-                                                       <CLKOPS_RATE_MUX_DIV>;
                                                #clock-init-cells = <1>;
                                        };
 
-                                       clk_mac_ref_div: clk_mac_ref_div {
+                                       clk_mac_pll_div: clk_mac_pll_div {
                                                compatible = "rockchip,rk3188-div-con";
                                                rockchip,bits = <9 5>;
-                                               clocks = <&clk_mac_ref>;
-                                               clock-output-names = "clk_mac";
+                                               clocks = <&clk_mac_pll>;
+                                               clock-output-names = "clk_mac_pll";
                                                rockchip,div-type = <CLK_DIVIDER_PLUS_ONE>;
                                                #clock-cells = <0>;
+                                               rockchip,clkops-idx =
+                                                       <CLKOPS_RATE_MUX_DIV>;
                                                #clock-init-cells = <1>;
                                        };