Put some of the AVX-512 parsing stuff in a more consistent place with the existing...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189204 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp
index a090b336557512b9532abec206b0394727af86ab..aa9524b98eba649f6ded9ad9059c7d60d9015293 100644 (file)
--- a/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -814,6 +814,9 @@ struct X86Operand : public MCParsedAsmOperand {
   bool isMem256() const {
     return Kind == Memory && (!Mem.Size || Mem.Size == 256);
   }
+  bool isMem512() const {
+    return Kind == Memory && (!Mem.Size || Mem.Size == 512);
+  }
 
   bool isMemVX32() const {
     return Kind == Memory && (!Mem.Size || Mem.Size == 32) &&
@@ -840,10 +843,6 @@ struct X86Operand : public MCParsedAsmOperand {
       getMemIndexReg() >= X86::ZMM0 && getMemIndexReg() <= X86::ZMM31;
   }
 
-  bool isMem512() const {
-    return Kind == Memory && (!Mem.Size || Mem.Size == 512);
-  }
-
   bool isAbsMem() const {
     return Kind == Memory && !getMemSegReg() && !getMemBaseReg() &&
       !getMemIndexReg() && getMemScale() == 1;
@@ -907,28 +906,27 @@ struct X86Operand : public MCParsedAsmOperand {
   void addMem256Operands(MCInst &Inst, unsigned N) const {
     addMemOperands(Inst, N);
   }
+  void addMem512Operands(MCInst &Inst, unsigned N) const {
+    addMemOperands(Inst, N);
+  }
   void addMemVX32Operands(MCInst &Inst, unsigned N) const {
     addMemOperands(Inst, N);
   }
   void addMemVY32Operands(MCInst &Inst, unsigned N) const {
     addMemOperands(Inst, N);
   }
-  void addMemVX64Operands(MCInst &Inst, unsigned N) const {
+  void addMemVZ32Operands(MCInst &Inst, unsigned N) const {
     addMemOperands(Inst, N);
   }
-  void addMemVY64Operands(MCInst &Inst, unsigned N) const {
+  void addMemVX64Operands(MCInst &Inst, unsigned N) const {
     addMemOperands(Inst, N);
   }
-
-  void addMemVZ32Operands(MCInst &Inst, unsigned N) const {
+  void addMemVY64Operands(MCInst &Inst, unsigned N) const {
     addMemOperands(Inst, N);
   }
   void addMemVZ64Operands(MCInst &Inst, unsigned N) const {
     addMemOperands(Inst, N);
   }
-  void addMem512Operands(MCInst &Inst, unsigned N) const {
-    addMemOperands(Inst, N);
-  }
 
   void addMemOperands(MCInst &Inst, unsigned N) const {
     assert((N == 5) && "Invalid number of operands!");

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index adad17ac8f533e38524c683f987655585bcb9430..f6a115f122badbf7935754bd9cb5163ac1ae15ed 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -302,6 +302,9 @@ def X86Mem128AsmOperand : AsmOperandClass {
 def X86Mem256AsmOperand : AsmOperandClass {
   let Name = "Mem256"; let PredicateMethod = "isMem256";
 }
+def X86Mem512AsmOperand : AsmOperandClass {
+  let Name = "Mem512"; let PredicateMethod = "isMem512";
+}
 
 // Gather mem operands
 def X86MemVX32Operand : AsmOperandClass {
@@ -310,22 +313,18 @@ def X86MemVX32Operand : AsmOperandClass {
 def X86MemVY32Operand : AsmOperandClass {
   let Name = "MemVY32"; let PredicateMethod = "isMemVY32";
 }
+def X86MemVZ32Operand : AsmOperandClass {
+  let Name = "MemVZ32"; let PredicateMethod = "isMemVZ32";
+}
 def X86MemVX64Operand : AsmOperandClass {
   let Name = "MemVX64"; let PredicateMethod = "isMemVX64";
 }
 def X86MemVY64Operand : AsmOperandClass {
   let Name = "MemVY64"; let PredicateMethod = "isMemVY64";
 }
-
 def X86MemVZ64Operand : AsmOperandClass {
   let Name = "MemVZ64"; let PredicateMethod = "isMemVZ64";
 }
-def X86MemVZ32Operand : AsmOperandClass {
-  let Name = "MemVZ32"; let PredicateMethod = "isMemVZ32";
-}
-def X86Mem512AsmOperand : AsmOperandClass {
-  let Name = "Mem512"; let PredicateMethod = "isMem512";
-}
 
 def X86AbsMemAsmOperand : AsmOperandClass {
   let Name = "AbsMem";