phonepad: rt3261 update dsp reg setting.
author宋秀杰 <sxj@rock-chips.com>
Fri, 21 Sep 2012 11:11:54 +0000 (19:11 +0800)
committer宋秀杰 <sxj@rock-chips.com>
Fri, 21 Sep 2012 11:13:37 +0000 (19:13 +0800)
sound/soc/codecs/rt3261-dsp.c

index 84ec5fa9015ce83c506ef5760c7996fd7dd7b45b..2bbaaf7897edd9fbb1dc6229253766dd75f83f9d 100644 (file)
@@ -53,24 +53,63 @@ unsigned short rt3261_dsp_16[][2] = {
 #define RT3261_DSP_16_NUM (sizeof(rt3261_dsp_16) / sizeof(rt3261_dsp_16[0]))
 
 static const u16 rt3261_dsp_aec_ns_fens[][2] = {
-       {0x22f8, 0x8005}, {0x2303, 0x0971}, {0x2304, 0x0312}, {0x2305, 0x0005},
-       {0x2309, 0x0400}, {0x230a, 0x1b00}, {0x230c, 0x0200}, {0x230d, 0x0300},
-       {0x2310, 0x0824}, {0x2325, 0x5000}, {0x2326, 0x0040}, {0x232f, 0x0080},
-       {0x2332, 0x0080}, {0x2333, 0x0008}, {0x2337, 0x0002}, {0x2339, 0x0010},
-       {0x2348, 0x1000}, {0x2349, 0x1000}, {0x2360, 0x0180}, {0x2361, 0x1800},
-       {0x2362, 0x0180}, {0x2363, 0x0100}, {0x2364, 0x0078}, {0x2365, 0x2000},
-       {0x236e, 0x1800}, {0x236f, 0x0a0a}, {0x2370, 0x0f00}, {0x2372, 0x1a00},
-       {0x2373, 0x3000}, {0x2374, 0x2400}, {0x2375, 0x1800}, {0x2380, 0x7fff},
-       {0x2381, 0x4000}, {0x2382, 0x0400}, {0x2383, 0x0400}, {0x2384, 0x0005},
-       {0x2385, 0x0005}, {0x238c, 0x0400}, {0x238e, 0x7000}, {0x2393, 0x4444},
-       {0x2394, 0x4444}, {0x2395, 0x4444}, {0x2396, 0x2000}, {0x2396, 0x3000},
-       {0x2398, 0x0020}, {0x23a5, 0x0006}, {0x23a6, 0x7fff}, {0x23b3, 0x000e},
-       {0x23b4, 0x000a}, {0x23b7, 0x0008}, {0x23bb, 0x1000}, {0x23bc, 0x0130},
-       {0x23bd, 0x0100}, {0x23be, 0x2400}, {0x23cf, 0x0800}, {0x23d0, 0x0400},
-       {0x23d1, 0xff80}, {0x23d2, 0xff80}, {0x23d3, 0x0800}, {0x23d4, 0x3e00},
-       {0x23d5, 0x5000}, {0x23e7, 0x0800}, {0x23e8, 0x0e00}, {0x23e9, 0x7000},
-       {0x23ea, 0x7ff0}, {0x23ed, 0x0300}, {0x22fb, 0x0000}, {0x2328, 0x7fff},
+       {0x22F8, 0x8005},
+       {0x2309, 0x0400},
+       {0x2310, 0x0824},
+       {0x2332, 0x0080},
+       {0x2348, 0x1000},
+       {0x2362, 0x0180},
+       {0x236E, 0x1800},
+       {0x2373, 0x3000},
+       {0x2381, 0x4000},
+       {0x2398, 0x0020},
+       {0x23B4, 0x0012},
+       {0x23BD, 0x0100},
+       {0x23D1, 0xFF80},
+       {0x23D5, 0x7FFF},
+       {0x2303, 0x0931},
+       {0x2333, 0x0008},
+       {0x2349, 0x6800},
+       {0x2363, 0x0100},
+       {0x236F, 0x0A0A},
+       {0x2374, 0x2400},
+       {0x2382, 0x0400},
+       {0x238C, 0x0400},
+       {0x23A5, 0x0006},
+       {0x23B7, 0x0008},
+       {0x23BE, 0x2400},
+       {0x23D2, 0xFF80},
+       {0x23ED, 0x0300},
+       {0x2304, 0xC31F},
+       {0x230C, 0x0900},
+       {0x2337, 0x0002},
+       {0x2360, 0x0080},
+       {0x2364, 0x0078},
+       {0x2370, 0x0F00},
+       {0x2375, 0x1800},
+       {0x2383, 0x0400},
+       {0x2396, 0x2000},
+       {0x23A6, 0x7FFF},
+       {0x23BB, 0x1000},
+       {0x23CF, 0x7FFF},
+       {0x2305, 0x0005},
+       {0x232F, 0x0080},
+       {0x2339, 0x0010},
+       {0x2361, 0x1800},
+       {0x2380, 0x7FFF},
+       {0x2384, 0x0005},
+       {0x23B3, 0x0018},
+       {0x23BC, 0x0130},
+       {0x2328, 0x7FFF},
+       {0x233A, 0x7FFF},
+       {0x233B, 0x7FFF},
+       {0x233C, 0x7FFF},
+       {0x2302, 0x0101},
+       {0x22F2, 0x0040},
+       {0x230A, 0x1B00},
+       {0x22FB, 0x0000},
 };
+
 #define RT3261_DSP_AEC_NUM \
        (sizeof(rt3261_dsp_aec_ns_fens) / sizeof(rt3261_dsp_aec_ns_fens[0]))
 
@@ -267,7 +306,7 @@ int rt3261_dsp_write(struct snd_soc_codec *codec,
                dev_err(codec->dev, "Failed to write DSP cmd reg: %d\n", ret);
                goto err;
        }
-       mdelay(10);
+       //mdelay(10);
        return 0;
 
 err: