port the ARM backend to use ISD::CALL instead of LowerCallTo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28469 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index e4e99db391b006357deaee24043e1d475aa3740b..54c7101e408b1d175d464602e8792a522f829fb0 100644 (file)
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -40,13 +40,6 @@ namespace {
   public:
     ARMTargetLowering(TargetMachine &TM);
     virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
-
-    virtual std::pair<SDOperand, SDOperand>
-      LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg,
-                  unsigned CC,
-                  bool isTailCall, SDOperand Callee, ArgListTy &Args,
-                  SelectionDAG &DAG);
-
   };
 
 }
@@ -56,11 +49,7 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
   setOperationAction(ISD::RET, MVT::Other, Custom);
 }
 
-std::pair<SDOperand, SDOperand>
-ARMTargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
-                                 bool isVarArg, unsigned CC,
-                                 bool isTailCall, SDOperand Callee,
-                                 ArgListTy &Args, SelectionDAG &DAG) {
+static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
   assert(0 && "Not implemented");
   abort();
 }
@@ -127,6 +116,8 @@ SDOperand ARMTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
     abort();
   case ISD::FORMAL_ARGUMENTS:
     return LowerFORMAL_ARGUMENTS(Op, DAG);
+  case ISD::CALL:
+    return LowerCALL(Op, DAG);
   case ISD::RET:
     return LowerRET(Op, DAG);
   }