R600/SI: Fix test to prepare for scheduler
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 19 Sep 2014 18:11:16 +0000 (18:11 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 19 Sep 2014 18:11:16 +0000 (18:11 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218131 91177308-0d34-0410-b5e6-96231b3b80d8

test/CodeGen/R600/smrd.ll

index 8bc7fd812355bdba615a1fda0da737fd201d3cfd..b63b01e659e9e5f8ab415acee7c2cba5048f67c0 100644 (file)
@@ -40,10 +40,10 @@ entry:
 ; CHECK-DAG: S_MOV_B32 s[[SLO:[0-9]+]], 0
 ; CHECK-DAG: S_MOV_B32 s[[SHI:[0-9]+]], 4
 ; FIXME: We don't need to copy these values to VGPRs
-; CHECK-DAG: V_MOV_B32_e32 v[[VHI:[0-9]+]], s[[SHI]]
 ; CHECK-DAG: V_MOV_B32_e32 v[[VLO:[0-9]+]], s[[SLO]]
+; CHECK-DAG: V_MOV_B32_e32 v[[VHI:[0-9]+]], s[[SHI]]
 ; FIXME: We should be able to use S_LOAD_DWORD here
-; CHECK: BUFFER_LOAD_DWORD v{{[0-9]+}}, v{{\[}}[[VLO]]:[[VHI]]{{\]}}, s[{{[0-9]+:[0-9]+}}], 0
+; CHECK: BUFFER_LOAD_DWORD v{{[0-9]+}}, v{{\[}}[[VLO]]:[[VHI]]{{\]}}, s[{{[0-9]+:[0-9]+}}], 0 addr64
 ; CHECK: S_ENDPGM
 define void @smrd3(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) {
 entry: