enum MachineOperandType {
kInvalid, ///< Uninitialized.
kRegister, ///< Register operand.
- kImmediate ///< Immediate operand.
+ kImmediate, ///< Immediate operand.
+ kMBBLabel ///< Basic block label.
};
unsigned char Kind;
union {
unsigned RegVal;
int64_t ImmVal;
+ struct {
+ unsigned FunctionNo;
+ unsigned BlockNo;
+ } MBBLabel;
};
public:
bool isReg() const { return Kind == kRegister; }
bool isImm() const { return Kind == kImmediate; }
+ bool isMBBLabel() const { return Kind == kMBBLabel; }
/// getReg - Returns the register number.
unsigned getReg() const {
ImmVal = Val;
}
+ unsigned getMBBLabelFunction() const {
+ assert(isMBBLabel() && "Wrong accessor");
+ return MBBLabel.FunctionNo;
+ }
+ unsigned getMBBLabelBlock() const {
+ assert(isMBBLabel() && "Wrong accessor");
+ return MBBLabel.BlockNo;
+ }
+
void MakeReg(unsigned Reg) {
Kind = kRegister;
RegVal = Reg;
Kind = kImmediate;
ImmVal = Val;
}
+ void MakeMBBLabel(unsigned Fn, unsigned MBB) {
+ Kind = kMBBLabel;
+ MBBLabel.FunctionNo = Fn;
+ MBBLabel.BlockNo = MBB;
+ }
};
DebugLoc getDebugLoc() const { return DebugLoc(); }
const MCOperand &getOperand(unsigned i) const { return Operands[i]; }
+ MCOperand &getOperand(unsigned i) { return Operands[i]; }
void addOperand(const MCOperand &Op) {
Operands.push_back(Op);
class Operand<ValueType ty> {
ValueType Type = ty;
string PrintMethod = "printOperand";
+ string AsmOperandLowerMethod = ?;
dag MIOperandInfo = (ops);
}
return false;
}
+static void lower_lea64_32mem(MCInst *MI, unsigned OpNo) {
+ // Convert registers in the addr mode according to subreg64.
+ for (unsigned i = 0; i != 4; ++i) {
+ if (!MI->getOperand(i).isReg()) continue;
+
+ unsigned Reg = MI->getOperand(i).getReg();
+ if (Reg == 0) continue;
+
+ MI->getOperand(i).setReg(getX86SubSuperRegister(Reg, MVT::i64));
+ }
+}
+
/// printMachineInstruction -- Print out a single X86 LLVM instruction MI in
/// AT&T syntax to the current output stream.
///
++EmittedInsts;
if (NewAsmPrinter) {
+ if (MI->getOpcode() == TargetInstrInfo::INLINEASM) {
+ O << "\t";
+ printInlineAsm(MI);
+ return;
+ } else if (MI->isLabel()) {
+ printLabel(MI);
+ return;
+ } else if (MI->getOpcode() == TargetInstrInfo::DECLARE) {
+ printDeclare(MI);
+ return;
+ } else if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) {
+ printImplicitDef(MI);
+ return;
+ }
+
O << "NEW: ";
MCInst TmpInst;
MCOp.MakeReg(MO.getReg());
} else if (MO.isImm()) {
MCOp.MakeImm(MO.getImm());
+ } else if (MO.isMBB()) {
+ MCOp.MakeMBBLabel(getFunctionNumber(), MO.getMBB()->getNumber());
} else {
assert(0 && "Unimp");
}
TmpInst.addOperand(MCOp);
}
- if (MI->getOpcode() == X86::LEA64_32r) {
+ if (TmpInst.getOpcode() == X86::LEA64_32r) {
// Should handle the 'subreg rewriting' for the lea64_32mem operand.
-
+ lower_lea64_32mem(&TmpInst, 1);
}
// FIXME: Convert TmpInst.
void printOperand(const MCInst *MI, unsigned OpNo,
const char *Modifier = 0, bool NotRIPRel = false);
- void printMemReference(const MCInst *MI, unsigned Op,
- const char *Modifier=NULL, bool NotRIPRel = false);
- void printLeaMemReference(const MCInst *MI, unsigned Op,
- const char *Modifier=NULL, bool NotRIPRel = false);
+ void printMemReference(const MCInst *MI, unsigned Op);
+ void printLeaMemReference(const MCInst *MI, unsigned Op);
void printSSECC(const MCInst *MI, unsigned Op);
void printPICLabel(const MCInst *MI, unsigned Op);
printLeaMemReference(MI, OpNo);
}
void printlea64_32mem(const MCInst *MI, unsigned OpNo) {
- printLeaMemReference(MI, OpNo, "subreg64");
+ printLeaMemReference(MI, OpNo);
}
#define DEBUG_TYPE "asm-printer"
#include "llvm/MC/MCInst.h"
#include "X86ATTAsmPrinter.h"
+#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
#undef MachineInstr
void X86ATTAsmPrinter::printSSECC(const MCInst *MI, unsigned Op) {
- unsigned char value = MI->getOperand(Op).getImm();
- assert(value <= 7 && "Invalid ssecc argument!");
- switch (value) {
+ switch (MI->getOperand(Op).getImm()) {
+ default: assert(0 && "Invalid ssecc argument!");
case 0: O << "eq"; break;
case 1: O << "lt"; break;
case 2: O << "le"; break;
void X86ATTAsmPrinter::printOperand(const MCInst *MI, unsigned OpNo,
const char *Modifier, bool NotRIPRel) {
- //assert(Modifier == 0 && "Modifiers should not be used");
+ assert(Modifier == 0 && "Modifiers should not be used");
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isReg()) {
O << '$';
O << Op.getImm();
return;
+ } else if (Op.isMBBLabel()) {
+ // FIXME: Keep in sync with printBasicBlockLabel. printBasicBlockLabel
+ // should eventually call into this code, not the other way around.
+
+ O << TAI->getPrivateGlobalPrefix() << "BB" << Op.getMBBLabelFunction()
+ << '_' << Op.getMBBLabelBlock();
+
+ // FIXME: with verbose asm print llvm bb name, add to operand.
+ return;
}
O << "<<UNKNOWN OPERAND KIND>>";
#endif
}
-void X86ATTAsmPrinter::printLeaMemReference(const MCInst *MI, unsigned Op,
- const char *Modifier,
- bool NotRIPRel) {
+void X86ATTAsmPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
+ const char *Modifier = 0;
+ bool NotRIPRel = false;
+
const MCOperand &BaseReg = MI->getOperand(Op);
const MCOperand &IndexReg = MI->getOperand(Op+2);
const MCOperand &DispSpec = MI->getOperand(Op+3);
}
}
-void X86ATTAsmPrinter::printMemReference(const MCInst *MI, unsigned Op,
- const char *Modifier, bool NotRIPRel){
+void X86ATTAsmPrinter::printMemReference(const MCInst *MI, unsigned Op) {
//assert(isMem(MI, Op) && "Invalid memory reference!");
const MCOperand &Segment = MI->getOperand(Op+4);
if (Segment.getReg()) {
- printOperand(MI, Op+4, Modifier);
+ printOperand(MI, Op+4);
O << ':';
}
- printLeaMemReference(MI, Op, Modifier, NotRIPRel);
+ printLeaMemReference(MI, Op);
}
def lea64_32mem : Operand<i32> {
let PrintMethod = "printlea64_32mem";
+ let AsmOperandLowerMethod = "lower_lea64_32mem";
let MIOperandInfo = (ops GR32, i8imm, GR32, i32imm);
}