Add a comment which should hopefully make the purpose of this method a

bit clearer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72374 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index b6f74aea41a6a32084fa5e3a5520fc4b5933b771..693ac68e30bb49335161474979b395eca8b03cab 100644 (file)
--- a/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -224,6 +224,9 @@ SDValue VectorLegalizer::LegalizeOp(SDValue Op) {
 }
 
 SDValue VectorLegalizer::PromoteVectorOp(SDValue Op) {
+  // Vector "promotion" is basically just bitcasting and doing the operation
+  // in a different type.  For example, x86 promotes ISD::AND on v2i32 to
+  // v1i64.
   MVT VT = Op.getValueType();
   assert(Op.getNode()->getNumValues() == 1 &&
          "Can't promote a vector with multiple results!");