#ifndef LLVM_CODEGEN_INSTR_SCHEDULING_H
#define LLVM_CODEGEN_INSTR_SCHEDULING_H
-class Pass;
+class FunctionPass;
class TargetMachine;
//---------------------------------------------------------------------------
// are still in SSA form.
//---------------------------------------------------------------------------
-Pass *createInstructionSchedulingWithSSAPass(const TargetMachine &Target);
+FunctionPass *createInstructionSchedulingWithSSAPass(const TargetMachine &Target);
#endif
class InstructionNode;
class TargetMachine;
class MachineCodeForInstruction;
-class Pass;
+class FunctionPass;
//===--------------------- Required Functions ---------------------------------
// Target-dependent functions that MUST be implemented for each target.
// Return a pass that performs machine dependant instruction selection.
//---------------------------------------------------------------------------
-Pass *createInstructionSelectionPass(TargetMachine &Target);
+FunctionPass *createInstructionSelectionPass(TargetMachine &Target);
//************************ Exported Data Types *****************************/
#define LLVM_CODEGEN_PEEPHOLE_OPTS_H
class TargetMachine;
-class Pass;
+class FunctionPass;
-Pass *createPeepholeOptsPass(TargetMachine &Target);
+FunctionPass *createPeepholeOptsPass(TargetMachine &Target);
#endif
#ifndef LLVM_CODEGEN_REGISTERALLOCATION_H
#define LLVM_CODEGEN_REGISTERALLOCATION_H
-class Pass;
+class FunctionPass;
class TargetMachine;
//----------------------------------------------------------------------------
// Entry point for register allocation for a module
//----------------------------------------------------------------------------
-Pass *getRegisterAllocator(TargetMachine &T);
+FunctionPass *getRegisterAllocator(TargetMachine &T);
#endif
// index of [0]).
// This pass decomposes all multi-dimensional references in a function.
-Pass *createDecomposeMultiDimRefsPass();
+FunctionPass *createDecomposeMultiDimRefsPass();
// This function decomposes a single instance of such a reference.
// Return value: true if the instruction was replaced; false otherwise.
// These two passes convert malloc and free instructions to and from %malloc &
// %free function calls.
//
-Pass *createLowerAllocationsPass();
+FunctionPass *createLowerAllocationsPass();
Pass *createRaiseAllocationsPass();
//===----------------------------------------------------------------------===//
}
-Pass *createInstructionSchedulingWithSSAPass(const TargetMachine &tgt) {
+FunctionPass *createInstructionSchedulingWithSSAPass(const TargetMachine &tgt) {
return new InstructionSchedulingWithSSA(tgt);
}
};
}
-Pass *getRegisterAllocator(TargetMachine &T) {
+FunctionPass *getRegisterAllocator(TargetMachine &T) {
return new RegisterAllocator(T);
}
}
-Pass *createInstructionSchedulingWithSSAPass(const TargetMachine &tgt) {
+FunctionPass *createInstructionSchedulingWithSSAPass(const TargetMachine &tgt) {
return new InstructionSchedulingWithSSA(tgt);
}
};
}
-Pass *getRegisterAllocator(TargetMachine &T) {
+FunctionPass *getRegisterAllocator(TargetMachine &T) {
return new RegisterAllocator(T);
}
}
}
-Pass* UltraSparc::getPrologEpilogInsertionPass() {
+FunctionPass *UltraSparc::getPrologEpilogInsertionPass() {
return new InsertPrologEpilogCode();
}
RegisterOpt<DecomposePass> X("lowerrefs", "Decompose multi-dimensional "
"structure/array references");
-Pass
+FunctionPass
*createDecomposeMultiDimRefsPass()
{
return new DecomposePass();
}
// createLowerAllocationsPass - Interface to this file...
-Pass *createLowerAllocationsPass() {
+FunctionPass *createLowerAllocationsPass() {
return new LowerAllocations();
}