const MachineOperand &MO2 = MI->getOperand(Op+1);
if (!MO1.getReg()) {
- if (ARM_AM::getAM2Offset(MO2.getImm())) // Don't print +0.
- O << "#"
- << (char)ARM_AM::getAM2Op(MO2.getImm())
- << ARM_AM::getAM2Offset(MO2.getImm());
+ unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
+ assert(ImmOffs && "Malformed indexed load / store!");
+ O << "#"
+ << (char)ARM_AM::getAM2Op(MO2.getImm())
+ << ImmOffs;
return;
}
}
unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
+ assert(ImmOffs && "Malformed indexed load / store!");
O << "#"
- << (char)ARM_AM::getAM3Op(MO2.getImm())
+ << (char)ARM_AM::getAM3Op(MO2.getImm())
<< ImmOffs;
}