fix assembly syntax

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30977 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 23b2155c85111296ea05f40d84df2a2a7a6026e6..e5db101865b033b77116eea4b1a60d59a944481c 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -114,19 +114,19 @@ def ldr   : InstARM<(ops IntRegs:$dst, memri:$addr),
                      [(set IntRegs:$dst, (load iaddr:$addr))]>;
 
 def LDRB    : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
-                       "ldrb $dst, $addr",
+                       "ldrb $dst, [$addr]",
                        [(set IntRegs:$dst, (zextloadi8 IntRegs:$addr))]>;
 
 def LDRSB   : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
-                       "ldrsb $dst, $addr",
+                       "ldrsb $dst, [$addr]",
                        [(set IntRegs:$dst, (sextloadi8 IntRegs:$addr))]>;
 
 def LDRH    : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
-                       "ldrh $dst, $addr",
+                       "ldrh $dst, [$addr]",
                        [(set IntRegs:$dst, (zextloadi16 IntRegs:$addr))]>;
 
 def LDRSH   : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
-                       "ldrsh $dst, $addr",
+                       "ldrsh $dst, [$addr]",
                        [(set IntRegs:$dst, (sextloadi16 IntRegs:$addr))]>;
 
 def str  : InstARM<(ops IntRegs:$src, memri:$addr),