added isPseudoInstr()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1302 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Target/MachineInstrInfo.h b/include/llvm/Target/MachineInstrInfo.h
index 547ebb7cc46e1542a01f3e98df320285938040c8..a64cbbe86282a8fa89777c0ea42e8d9d9af0b6ce 100644 (file)
--- a/include/llvm/Target/MachineInstrInfo.h
+++ b/include/llvm/Target/MachineInstrInfo.h
@@ -55,6 +55,7 @@ const unsigned int    M_LOAD_FLAG             = 1 << 10;
 const unsigned int     M_PREFETCH_FLAG         = 1 << 11;
 const unsigned int     M_STORE_FLAG            = 1 << 12;
 const unsigned int     M_DUMMY_PHI_FLAG        = 1 << 13;
+const unsigned int      M_PSEUDO_FLAG           = 1 << 14;
 
 
 struct MachineInstrDescriptor {
@@ -179,6 +180,11 @@ public:
   bool isPhi(const MachineOpCode opCode) const 
   { return isDummyPhiInstr(opCode); }  
   
+  bool isPseudoInstr(const MachineOpCode opCode) const {
+    return getDescriptor(opCode).iclass & M_PSEUDO_FLAG;
+  }
+
+
 
   // Check if an instruction can be issued before its operands are ready,
   // or if a subsequent instruction that uses its result can be issued

diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index 547ebb7cc46e1542a01f3e98df320285938040c8..a64cbbe86282a8fa89777c0ea42e8d9d9af0b6ce 100644 (file)
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -55,6 +55,7 @@ const unsigned int    M_LOAD_FLAG             = 1 << 10;
 const unsigned int     M_PREFETCH_FLAG         = 1 << 11;
 const unsigned int     M_STORE_FLAG            = 1 << 12;
 const unsigned int     M_DUMMY_PHI_FLAG        = 1 << 13;
+const unsigned int      M_PSEUDO_FLAG           = 1 << 14;
 
 
 struct MachineInstrDescriptor {
@@ -179,6 +180,11 @@ public:
   bool isPhi(const MachineOpCode opCode) const 
   { return isDummyPhiInstr(opCode); }  
   
+  bool isPseudoInstr(const MachineOpCode opCode) const {
+    return getDescriptor(opCode).iclass & M_PSEUDO_FLAG;
+  }
+
+
 
   // Check if an instruction can be issued before its operands are ready,
   // or if a subsequent instruction that uses its result can be issued