[Hexagon] Fixing mistaken case fallthrough.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251867 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp b/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
index 8f9d03f344b425ab4eeb80cba2d90d47501694e5..ef1887756aca0305b6861ca43f59923942ce7d4d 100644 (file)
--- a/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
+++ b/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
@@ -1054,6 +1054,7 @@ static void AddSubinstOperands(MCInst *MI, unsigned opcode, unsigned inst) {
     operand = getDRegFromSubinstEncoding(inst & 0x7);
     Op = MCOperand::createReg(operand);
     MI->addOperand(Op);
+    break;
   case Hexagon::V4_SS2_storeh_io:
     // Rs 7-4, u 10-8{3_1}, Rt 3-0
     operand = getRegFromSubinstEncoding((inst & 0xf0) >> 4);