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rk3368: dts: init gpll rate before clk_core_b and clk_core_l
author
dkl
<dkl@rock-chips.com>
Sat, 13 Dec 2014 04:27:04 +0000
(12:27 +0800)
committer
Huang, Tao
<huangtao@rock-chips.com>
Sat, 13 Dec 2014 05:43:14 +0000
(13:43 +0800)
It's better to init gpll rate before clk_core_b and clk_core_l,
because gpll will be used when clk_core_b and clk_core_l change rate.
Signed-off-by: dkl <dkl@rock-chips.com>
arch/arm64/boot/dts/rk3368.dtsi
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diff --git
a/arch/arm64/boot/dts/rk3368.dtsi
b/arch/arm64/boot/dts/rk3368.dtsi
index de0fa254c7019f42fbdc4049a2a6b3b4cae76b12..1afc30dbf3acd4d2011a9c79b88b9054c16d12df 100644
(file)
--- a/
arch/arm64/boot/dts/rk3368.dtsi
+++ b/
arch/arm64/boot/dts/rk3368.dtsi
@@
-450,8
+450,8
@@
<&clk_uart_pll &clk_gpll>, <&aclk_gpu &clk_cpll>,
<&clk_cs &clk_gpll>;
rockchip,clocks-init-rate =
- <&clk_
core_b 792000000>, <&clk_core_l 600
000000>,
- <&clk_
gpll 576000000>,
<&clk_cpll 400000000>,
+ <&clk_
gpll 576000000>, <&clk_core_b 792
000000>,
+ <&clk_
core_l 600000000>,
<&clk_cpll 400000000>,
/*<&clk_npll 500000000>,*/ <&aclk_bus 300000000>,
<&hclk_bus 150000000>, <&pclk_bus 75000000>,
<&clk_crypto 150000000>, <&aclk_peri 300000000>,