ARM: OMAP: AM33xx: clock: Add RNG clock data
authorLokesh Vutla <lokeshvutla@ti.com>
Tue, 6 Aug 2013 08:33:03 +0000 (14:03 +0530)
committerPaul Walmsley <paul@pwsan.com>
Fri, 23 Aug 2013 18:38:07 +0000 (12:38 -0600)
Add clock data for RNG module on AM33xx SoC.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
arch/arm/mach-omap2/cclock33xx_data.c

index ba6534d7f155a6adc94a5ecb201d5cd7815c939f..865d30ee812f1902b04dbdd70d2b57ed4e391290 100644 (file)
@@ -421,6 +421,10 @@ static struct clk aes0_fck;
 DEFINE_STRUCT_CLK_HW_OMAP(aes0_fck, NULL);
 DEFINE_STRUCT_CLK(aes0_fck, dpll_core_ck_parents, clk_ops_null);
 
+static struct clk rng_fck;
+DEFINE_STRUCT_CLK_HW_OMAP(rng_fck, NULL);
+DEFINE_STRUCT_CLK(rng_fck, dpll_core_ck_parents, clk_ops_null);
+
 /*
  * Modules clock nodes
  *
@@ -966,6 +970,7 @@ static struct omap_clk am33xx_clks[] = {
        CLK(NULL,       "smartreflex1_fck",     &smartreflex1_fck),
        CLK(NULL,       "sha0_fck",             &sha0_fck),
        CLK(NULL,       "aes0_fck",             &aes0_fck),
+       CLK(NULL,       "rng_fck",              &rng_fck),
        CLK(NULL,       "timer1_fck",           &timer1_fck),
        CLK(NULL,       "timer2_fck",           &timer2_fck),
        CLK(NULL,       "timer3_fck",           &timer3_fck),