MC-ization of the PICLDR pseudo. Next up, adding the other variants

(PICLDRB, et. al.) and PICSTR*

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114098 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp
index cea9fd5aaeca8efa098b78cdfd2d5c2b76238fa4..df75ff203dc46888c91389a6245aff82e64be628 100644 (file)
--- a/lib/Target/ARM/ARMAsmPrinter.cpp
+++ b/lib/Target/ARM/ARMAsmPrinter.cpp
@@ -1351,6 +1351,35 @@ void ARMAsmPrinter::printInstructionThroughMCStreamer(const MachineInstr *MI) {
     OutStreamer.EmitInstruction(AddInst);
     return;
   }
+  case ARM::PICLDR: {
+    // This is a pseudo op for a label + instruction sequence, which looks like:
+    // LPC0:
+    //     ldr r0, [pc, r0]
+    // The LCP0 label is referenced by a constant pool entry in order to get
+    // a PC-relative address at the ldr instruction.
+
+    // Emit the label.
+    // FIXME: MOVE TO SHARED PLACE.
+    unsigned Id = (unsigned)MI->getOperand(2).getImm();
+    const char *Prefix = MAI->getPrivateGlobalPrefix();
+    MCSymbol *Label =OutContext.GetOrCreateSymbol(Twine(Prefix)
+                         + "PC" + Twine(getFunctionNumber()) + "_" + Twine(Id));
+    OutStreamer.EmitLabel(Label);
+
+    // Form and emit the load
+    MCInst LdrInst;
+    LdrInst.setOpcode(ARM::LDR);
+    LdrInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
+    LdrInst.addOperand(MCOperand::CreateReg(ARM::PC));
+    LdrInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg()));
+    LdrInst.addOperand(MCOperand::CreateImm(0));
+    // Add predicate operands.
+    LdrInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm()));
+    LdrInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg()));
+    OutStreamer.EmitInstruction(LdrInst);
+
+    return;
+  }
   case ARM::CONSTPOOL_ENTRY: { // FIXME: Remove asm string from td file.
     /// CONSTPOOL_ENTRY - This instruction represents a floating constant pool
     /// in the function.  The first operand is the ID# for this instruction, the

diff --git a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
index 37c4f75e82244bbc57e5f73910e3759136a56ba2..2e48905791cb60f8f6067192882c1b2d51d4ffbd 100644 (file)
--- a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
+++ b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
@@ -384,7 +384,10 @@ void ARMInstPrinter::printAddrMode6OffsetOperand(const MCInst *MI,
 void ARMInstPrinter::printAddrModePCOperand(const MCInst *MI, unsigned OpNum,
                                             raw_ostream &O,
                                             const char *Modifier) {
-  assert(0 && "FIXME: Implement printAddrModePCOperand");
+  // All instructions using addrmodepc are pseudos and should have been
+  // handled explicitly in printInstructionThroughMCStreamer(). If one got
+  // here, it wasn't, so something's wrong.
+  assert(0 && "Unhandled addrmodepc operand!");
 }
 
 void ARMInstPrinter::printBitfieldInvMaskImmOperand(const MCInst *MI,