clk: rockchip: fix and add some critical clocks for rk3399
authorXing Zheng <zhengxing@rock-chips.com>
Tue, 22 Mar 2016 06:29:37 +0000 (14:29 +0800)
committerXing Zheng <zhengxing@rock-chips.com>
Tue, 22 Mar 2016 06:43:17 +0000 (14:43 +0800)
Change-Id: I1db9ab40ba9c25d5054a4011eee1ea14f1207443
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
drivers/clk/rockchip/clk-rk3399.c

index 702a75cdcb790119c8bb629b370af225c8835175..29f56371d76aae2d77ea68a7cc5fb2cf76228ffd 100644 (file)
@@ -1351,8 +1351,9 @@ static struct rockchip_clk_branch rk3399_clk_pmu_branches[] __initdata = {
                        RK3399_CLKSEL_CON(1), 7, 1, MFLAGS, 0, 7, DFLAGS,
                        RK3399_CLKGATE_CON(0), 2, GFLAGS),
 
-       COMPOSITE_NOGATE(0, "clk_wifi_div", mux_ppll_24m_p, CLK_IGNORE_UNUSED,
-                       RK3399_CLKSEL_CON(1), 13, 1, MFLAGS, 8, 5, DFLAGS),
+       COMPOSITE(0, "clk_wifi_div", mux_ppll_24m_p, CLK_IGNORE_UNUSED,
+                       RK3399_CLKSEL_CON(1), 13, 1, MFLAGS, 8, 5, DFLAGS,
+                       RK3399_CLKGATE_CON(0), 8, GFLAGS),
 
        COMPOSITE_FRACMUX_NOGATE(0, "clk_wifi_frac", "clk_wifi_div", CLK_SET_RATE_PARENT,
                        RK3399_CLKSEL_CON(7), 0,
@@ -1422,6 +1423,11 @@ static struct rockchip_clk_branch rk3399_clk_pmu_branches[] __initdata = {
 static const char *const rk3399_critical_clocks[] __initconst = {
        "aclk_cci_pre",
        "pclk_pmu_src",
+       "pclk_perilp0",
+       "hclk_perilp0",
+       "pclk_perilp1",
+       "pclk_perihp",
+       "hclk_perihp",
 };
 
 static void __init rk3399_clk_init(struct device_node *np)