ARM: bcm63138: add NAND DT support
authorBrian Norris <computersforpeace@gmail.com>
Wed, 13 May 2015 00:53:42 +0000 (17:53 -0700)
committerFlorian Fainelli <f.fainelli@gmail.com>
Wed, 13 May 2015 17:56:46 +0000 (10:56 -0700)
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
arch/arm/boot/dts/bcm63138.dtsi
arch/arm/boot/dts/bcm963138dvt.dts

index bcc0089b01508f80e4a1e6064f12a187083c1c58..c7175487d7d747c5814252c4117d3a460571d615 100644 (file)
                        reg = <0x4800e0 0x10>;
                        #reset-cells = <2>;
                };
+
+               nand: nand@2000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.0", "brcm,brcmnand";
+                       reg = <0x2000 0x600>, <0xf0 0x10>;
+                       reg-names = "nand", "nand-int-base";
+                       status = "disabled";
+                       interrupts = <GIC_SPI 38 0>;
+                       interrupt-names = "nand";
+               };
        };
 
        /* Legacy UBUS base */
index 69c93395ecd241acd90052d8145f56d0ae8a4896..370aa2cfddf207293a0642e4dce9c9880e7a4e25 100644 (file)
 &serial1 {
        status = "okay";
 };
+
+&nand {
+       status = "okay";
+
+       nandcs@0 {
+               compatible = "brcm,nandcs";
+               reg = <0>;
+               nand-ecc-strength = <4>;
+               nand-ecc-step-size = <512>;
+               brcm,nand-oob-sectors-size = <16>;
+       };
+};