return ReplaceInstUsesWith(I, CSI);
// See if we can turn a signed shr into an unsigned shr.
- if (!isa<VectorType>(I.getType()) &&
- MaskedValueIsZero(Op0,
+ if (!isa<VectorType>(I.getType())) {
+ if (MaskedValueIsZero(Op0,
APInt::getSignBit(I.getType()->getPrimitiveSizeInBits())))
- return BinaryOperator::CreateLShr(Op0, I.getOperand(1));
+ return BinaryOperator::CreateLShr(Op0, I.getOperand(1));
- // Arithmetic shifting an all-sign-bit value is a no-op.
- unsigned NumSignBits = ComputeNumSignBits(Op0);
- if (NumSignBits == Op0->getType()->getPrimitiveSizeInBits())
- return ReplaceInstUsesWith(I, Op0);
+ // Arithmetic shifting an all-sign-bit value is a no-op.
+ unsigned NumSignBits = ComputeNumSignBits(Op0);
+ if (NumSignBits == Op0->getType()->getPrimitiveSizeInBits())
+ return ReplaceInstUsesWith(I, Op0);
+ }
return 0;
}
--- /dev/null
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis
+; PR3826
+
+define void @0(<4 x i16>*, <4 x i16>*) {
+ %3 = alloca <4 x i16>* ; <<4 x i16>**> [#uses=1]
+ %4 = load <4 x i16>* null, align 1 ; <<4 x i16>> [#uses=1]
+ %5 = ashr <4 x i16> %4, <i16 5, i16 5, i16 5, i16 5> ; <<4 x i16>> [#uses=1]
+ %6 = load <4 x i16>** %3 ; <<4 x i16>*> [#uses=1]
+ store <4 x i16> %5, <4 x i16>* %6, align 1
+ ret void
+}