invert the sense of this switch and its name

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25234 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp
index e0766d1a2ad6a3f3437aed74edfd6400dfd0b10b..fbe353fc05132479dc05641023b5aeaaec38557d 100644 (file)
--- a/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -28,9 +28,9 @@ namespace {
   // Register the target.
   RegisterTarget<SparcV8TargetMachine> X("sparcv8","  SPARC V8 (experimental)");
 
-  cl::opt<bool> DisableV8DAGDAG("disable-v8-dag-isel", cl::Hidden,
-                                cl::desc("Disable DAG-to-DAG isel for V8"),
-                                cl::init(1));
+  cl::opt<bool> EnableV8DAGDAG("enable-v8-dag-isel", cl::Hidden,
+                                cl::desc("Enable DAG-to-DAG isel for V8"),
+                                cl::init(0));
 }
 
 /// SparcV8TargetMachine ctor - Create an ILP32 architecture model
@@ -86,7 +86,7 @@ bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM,
   if (PrintMachineCode)
     PM.add(new PrintFunctionPass());
 
-  if (DisableV8DAGDAG) {
+  if (!EnableV8DAGDAG) {
     // Replace malloc and free instructions with library calls.
     PM.add(createLowerAllocationsPass());
     PM.add(createLowerSelectPass());

diff --git a/lib/Target/SparcV8/SparcV8TargetMachine.cpp b/lib/Target/SparcV8/SparcV8TargetMachine.cpp
index e0766d1a2ad6a3f3437aed74edfd6400dfd0b10b..fbe353fc05132479dc05641023b5aeaaec38557d 100644 (file)
--- a/lib/Target/SparcV8/SparcV8TargetMachine.cpp
+++ b/lib/Target/SparcV8/SparcV8TargetMachine.cpp
@@ -28,9 +28,9 @@ namespace {
   // Register the target.
   RegisterTarget<SparcV8TargetMachine> X("sparcv8","  SPARC V8 (experimental)");
 
-  cl::opt<bool> DisableV8DAGDAG("disable-v8-dag-isel", cl::Hidden,
-                                cl::desc("Disable DAG-to-DAG isel for V8"),
-                                cl::init(1));
+  cl::opt<bool> EnableV8DAGDAG("enable-v8-dag-isel", cl::Hidden,
+                                cl::desc("Enable DAG-to-DAG isel for V8"),
+                                cl::init(0));
 }
 
 /// SparcV8TargetMachine ctor - Create an ILP32 architecture model
@@ -86,7 +86,7 @@ bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM,
   if (PrintMachineCode)
     PM.add(new PrintFunctionPass());
 
-  if (DisableV8DAGDAG) {
+  if (!EnableV8DAGDAG) {
     // Replace malloc and free instructions with library calls.
     PM.add(createLowerAllocationsPass());
     PM.add(createLowerSelectPass());