Tidy a bit more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67617 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index 49e6744351508299d7b773ff2f0076c8f3f2b28a..0f5cc17d8d1d3e7c4b9dbb211a8ea7b6577da852 100644 (file)
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -4929,15 +4929,15 @@ GetRegistersForValue(SDISelAsmOperandInfo &OpInfo,
 
   // Otherwise, if this was a reference to an LLVM register class, create vregs
   // for this reference.
-  if (PhysReg.second != 0) {
-    RegVT = *PhysReg.second->vt_begin();
+  if (const TargetRegisterClass *RC = PhysReg.second) {
+    RegVT = *RC->vt_begin();
     if (OpInfo.ConstraintVT == MVT::Other)
       ValueVT = RegVT;
 
     // Create the appropriate number of virtual registers.
     MachineRegisterInfo &RegInfo = MF.getRegInfo();
     for (; NumRegs; --NumRegs)
-      Regs.push_back(RegInfo.createVirtualRegister(PhysReg.second));
+      Regs.push_back(RegInfo.createVirtualRegister(RC));
 
     OpInfo.AssignedRegs = RegsForValue(TLI, Regs, RegVT, ValueVT);
     return;