rk3168_86v: add rk3168_86v_old,the arm is connected to the DCDC
authorhjc <hjc@rock-chips.com>
Mon, 25 Feb 2013 07:53:25 +0000 (15:53 +0800)
committerhjc <hjc@rock-chips.com>
Mon, 25 Feb 2013 07:57:04 +0000 (15:57 +0800)
arch/arm/configs/rk3168_86v_old_defconfig [new file with mode: 0644]
arch/arm/mach-rk30/Kconfig
arch/arm/mach-rk30/Makefile
arch/arm/mach-rk30/board-rk3168-86v-old-sdmmc-config.c [new file with mode: 0755]
arch/arm/mach-rk30/board-rk3168-86v-old.c [new file with mode: 0755]

diff --git a/arch/arm/configs/rk3168_86v_old_defconfig b/arch/arm/configs/rk3168_86v_old_defconfig
new file mode 100644 (file)
index 0000000..bc84715
--- /dev/null
@@ -0,0 +1,423 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_KERNEL_LZO=y
+CONFIG_LOG_BUF_SHIFT=19
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_DEBUG=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_PANIC_TIMEOUT=1
+# CONFIG_SYSCTL_SYSCALL is not set
+# CONFIG_ELF_CORE is not set
+CONFIG_ASHMEM=y
+# CONFIG_AIO is not set
+CONFIG_EMBEDDED=y
+# CONFIG_SLUB_DEBUG is not set
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_ARCH_RK30=y
+CONFIG_DDR_INIT_CHANGE_FREQ=y
+CONFIG_DDR_SDRAM_FREQ=324
+# CONFIG_DDR_FREQ is not set
+# CONFIG_DDR_TEST is not set
+CONFIG_RK_CLOCK_PROC=y
+CONFIG_CLK_SWITCH_TO_32K=y
+CONFIG_SOC_RK3168=y
+CONFIG_MACH_RK3168_86V_OLD=y
+CONFIG_FIQ_DEBUGGER=y
+CONFIG_FIQ_DEBUGGER_NO_SLEEP=y
+CONFIG_FIQ_DEBUGGER_CONSOLE=y
+CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_SMP=y
+# CONFIG_SMP_ON_UP is not set
+CONFIG_NR_CPUS=2
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_HIGHMEM=y
+CONFIG_COMPACTION=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=ttyFIQ0 androidboot.console=ttyFIQ0 init=/init"
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_IDLE=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_WAKELOCK=y
+CONFIG_PM_RUNTIME=y
+CONFIG_PM_DEBUG=y
+CONFIG_SUSPEND_TIME=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_INET_ESP=y
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_IPV6=y
+CONFIG_IPV6_PRIVACY=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+CONFIG_IPV6_MIP6=y
+CONFIG_IPV6_TUNNEL=y
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_NETFILTER=y
+# CONFIG_BRIDGE_NETFILTER is not set
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CT_PROTO_DCCP=y
+CONFIG_NF_CT_PROTO_SCTP=y
+CONFIG_NF_CT_PROTO_UDPLITE=y
+CONFIG_NF_CONNTRACK_AMANDA=y
+CONFIG_NF_CONNTRACK_FTP=y
+CONFIG_NF_CONNTRACK_H323=y
+CONFIG_NF_CONNTRACK_IRC=y
+CONFIG_NF_CONNTRACK_NETBIOS_NS=y
+CONFIG_NF_CONNTRACK_PPTP=y
+CONFIG_NF_CONNTRACK_SANE=y
+CONFIG_NF_CONNTRACK_SIP=y
+CONFIG_NF_CONNTRACK_TFTP=y
+CONFIG_NF_CT_NETLINK=y
+CONFIG_NETFILTER_TPROXY=y
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
+CONFIG_NETFILTER_XT_TARGET_MARK=y
+CONFIG_NETFILTER_XT_TARGET_NFLOG=y
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+CONFIG_NETFILTER_XT_TARGET_TPROXY=y
+CONFIG_NETFILTER_XT_TARGET_TRACE=y
+CONFIG_NETFILTER_XT_MATCH_COMMENT=y
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_HELPER=y
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
+CONFIG_NETFILTER_XT_MATCH_LENGTH=y
+CONFIG_NETFILTER_XT_MATCH_LIMIT=y
+CONFIG_NETFILTER_XT_MATCH_MAC=y
+CONFIG_NETFILTER_XT_MATCH_MARK=y
+CONFIG_NETFILTER_XT_MATCH_POLICY=y
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
+CONFIG_NETFILTER_XT_MATCH_QTAGUID=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
+CONFIG_NETFILTER_XT_MATCH_SOCKET=y
+CONFIG_NETFILTER_XT_MATCH_STATE=y
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
+CONFIG_NETFILTER_XT_MATCH_STRING=y
+CONFIG_NETFILTER_XT_MATCH_TIME=y
+CONFIG_NETFILTER_XT_MATCH_U32=y
+CONFIG_NF_CONNTRACK_IPV4=y
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_MATCH_AH=y
+CONFIG_IP_NF_MATCH_ECN=y
+CONFIG_IP_NF_MATCH_TTL=y
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_IP_NF_TARGET_REJECT_SKERR=y
+CONFIG_IP_NF_TARGET_LOG=y
+CONFIG_NF_NAT=y
+CONFIG_IP_NF_TARGET_MASQUERADE=y
+CONFIG_IP_NF_TARGET_NETMAP=y
+CONFIG_IP_NF_TARGET_REDIRECT=y
+CONFIG_IP_NF_MANGLE=y
+CONFIG_IP_NF_RAW=y
+CONFIG_IP_NF_ARPTABLES=y
+CONFIG_IP_NF_ARPFILTER=y
+CONFIG_IP_NF_ARP_MANGLE=y
+CONFIG_NF_CONNTRACK_IPV6=y
+CONFIG_IP6_NF_IPTABLES=y
+CONFIG_IP6_NF_TARGET_LOG=y
+CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_TARGET_REJECT=y
+CONFIG_IP6_NF_TARGET_REJECT_SKERR=y
+CONFIG_IP6_NF_MANGLE=y
+CONFIG_IP6_NF_RAW=y
+CONFIG_BRIDGE=y
+# CONFIG_BRIDGE_IGMP_SNOOPING is not set
+CONFIG_PHONET=y
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_HTB=y
+CONFIG_NET_SCH_INGRESS=y
+CONFIG_NET_CLS_U32=y
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_U32=y
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_ACT_POLICE=y
+CONFIG_NET_ACT_GACT=y
+CONFIG_NET_ACT_MIRRED=y
+CONFIG_CFG80211=y
+CONFIG_RFKILL=y
+CONFIG_RFKILL_RK=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_NAND_IDS=y
+CONFIG_MTD_RKNAND=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_MISC_DEVICES=y
+CONFIG_UID_STAT=y
+CONFIG_APANIC=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_DM=y
+CONFIG_DM_CRYPT=y
+CONFIG_DM_UEVENT=y
+CONFIG_NETDEVICES=y
+CONFIG_PHYLIB=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_WLAN_80211=y
+CONFIG_RTL8188EU=y
+CONFIG_USB_USBNET=y
+CONFIG_PPP=y
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=y
+CONFIG_PPP_SYNC_TTY=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_MPPE=y
+CONFIG_PPPOLAC=y
+CONFIG_PPPOPNS=y
+# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_KEYRESET=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_JOYSTICK_XPAD=y
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
+CONFIG_INPUT_TABLET=y
+CONFIG_TABLET_USB_ACECAD=y
+CONFIG_TABLET_USB_AIPTEK=y
+CONFIG_TABLET_USB_GTCO=y
+CONFIG_TABLET_USB_HANWANG=y
+CONFIG_TABLET_USB_KBTAB=y
+CONFIG_TABLET_USB_WACOM=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_86V_GT811_IIC=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_KEYCHORD=y
+CONFIG_INPUT_UINPUT=y
+CONFIG_GS_MMA7660=y
+CONFIG_SENSOR_DEVICE=y
+CONFIG_GSENSOR_DEVICE=y
+# CONFIG_SERIO is not set
+# CONFIG_CONSOLE_TRANSLATIONS is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_RK29=y
+CONFIG_UART0_RK29=y
+CONFIG_UART0_DMA_RK29=2
+CONFIG_UART3_RK29=y
+CONFIG_UART3_CTS_RTS_RK29=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+# CONFIG_I2C_COMPAT is not set
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C0_CONTROLLER_RK30=y
+CONFIG_I2C1_CONTROLLER_RK30=y
+CONFIG_I2C2_CONTROLLER_RK30=y
+CONFIG_I2C3_CONTROLLER_RK30=y
+CONFIG_I2C4_CONTROLLER_RK30=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_EXPANDED_GPIO_NUM=0
+CONFIG_EXPANDED_GPIO_IRQ_NUM=0
+CONFIG_SPI_FPGA_GPIO_NUM=0
+CONFIG_SPI_FPGA_GPIO_IRQ_NUM=0
+CONFIG_POWER_SUPPLY=y
+CONFIG_BATTERY_RK30_ADC_FAC=y
+CONFIG_BATTERY_RK30_AC_CHARGE=y
+CONFIG_BATTERY_RK30_VOL3V8=y
+CONFIG_POWER_ON_CHARGER_DISPLAY=y
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_RK29_WATCHDOG=y
+CONFIG_RK29_FEED_DOG_BY_INTE=y
+CONFIG_RK29_WATCHDOG_ATBOOT=y
+CONFIG_RK29_WATCHDOG_DEFAULT_TIME=5
+CONFIG_MFD_TPS65910=y
+CONFIG_MFD_RK610=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_TPS65910=y
+CONFIG_REGULATOR_ACT8846=y
+CONFIG_RK30_PWM_REGULATOR=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_VIDEO_DEV=y
+CONFIG_SOC_CAMERA=y
+CONFIG_SOC_CAMERA_GC0308=y
+CONFIG_VIDEO_RK29=y
+CONFIG_VIDEO_RK29_CAMMEM_ION=y
+CONFIG_ION=y
+CONFIG_ION_ROCKCHIP=y
+CONFIG_FB=y
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_DISPLAY_SUPPORT=y
+CONFIG_LCD_RK3168_86V=y
+CONFIG_RK610_LVDS=y
+CONFIG_FB_ROCKCHIP=y
+CONFIG_ONE_LCDC_DUAL_OUTPUT_INF=y
+CONFIG_LCDC_RK3066B=y
+# CONFIG_LCDC0_RK3066B is not set
+CONFIG_LCDC1_RK3066B=y
+CONFIG_RGA_RK30=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_SOUND=y
+CONFIG_SND=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_RK29_SOC=y
+CONFIG_SND_RK29_SOC_I2S_2CH=y
+CONFIG_SND_I2S_DMA_EVENT_STATIC=y
+CONFIG_SND_RK29_SOC_RK610=y
+CONFIG_SND_RK29_CODEC_SOC_SLAVE=y
+CONFIG_HID_A4TECH=y
+CONFIG_HID_ACRUX=y
+CONFIG_HID_ACRUX_FF=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_DRAGONRISE=y
+CONFIG_DRAGONRISE_FF=y
+CONFIG_HID_EMS_FF=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_KEYTOUCH=y
+CONFIG_HID_KYE=y
+CONFIG_HID_UCLOGIC=y
+CONFIG_HID_WALTOP=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_TWINHAN=y
+CONFIG_HID_KENSINGTON=y
+CONFIG_HID_LCPOWER=y
+CONFIG_HID_LOGITECH=y
+CONFIG_LOGITECH_FF=y
+CONFIG_LOGIRUMBLEPAD2_FF=y
+CONFIG_LOGIG940_FF=y
+CONFIG_LOGIWII_FF=y
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+CONFIG_HID_MULTITOUCH=y
+CONFIG_HID_NTRIG=y
+CONFIG_HID_ORTEK=y
+CONFIG_HID_PANTHERLORD=y
+CONFIG_PANTHERLORD_FF=y
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_PICOLCD=y
+CONFIG_HID_QUANTA=y
+CONFIG_HID_ROCCAT_ARVO=y
+CONFIG_HID_ROCCAT_KONE=y
+CONFIG_HID_ROCCAT_KONEPLUS=y
+CONFIG_HID_ROCCAT_KOVAPLUS=y
+CONFIG_HID_ROCCAT_PYRA=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+CONFIG_HID_GREENASIA=y
+CONFIG_GREENASIA_FF=y
+CONFIG_HID_SMARTJOYPLUS=y
+CONFIG_SMARTJOYPLUS_FF=y
+CONFIG_HID_TOPSEED=y
+CONFIG_HID_THRUSTMASTER=y
+CONFIG_THRUSTMASTER_FF=y
+CONFIG_HID_ZEROPLUS=y
+CONFIG_ZEROPLUS_FF=y
+CONFIG_HID_ZYDACRON=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_OPTION=y
+CONFIG_USB_GADGET=y
+CONFIG_USB20_HOST=y
+CONFIG_USB20_OTG=y
+CONFIG_DWC_OTG_BOTH_HOST_SLAVE=y
+CONFIG_MMC=y
+CONFIG_MMC_UNSAFE_RESUME=y
+CONFIG_MMC_EMBEDDED_SDIO=y
+CONFIG_MMC_PARANOID_SD_INIT=y
+CONFIG_SDMMC_RK29=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_SWITCH=y
+CONFIG_SWITCH_GPIO=y
+CONFIG_RTC_CLASS=y
+CONFIG_TPS65910_RTC=y
+CONFIG_STAGING=y
+CONFIG_ANDROID=y
+CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_ANDROID_LOGGER=y
+CONFIG_ANDROID_TIMED_GPIO=y
+CONFIG_ANDROID_LOW_MEMORY_KILLER=y
+# CONFIG_CMMB is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+CONFIG_EXT4_FS=y
+# CONFIG_EXT4_FS_XATTR is not set
+# CONFIG_DNOTIFY is not set
+CONFIG_FUSE_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_EFI_PARTITION=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_PRINTK_TIME=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_SCHEDSTATS=y
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_EVENT_POWER_TRACING_DEPRECATED is not set
+CONFIG_ENABLE_DEFAULT_TRACERS=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_TWOFISH=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
index 393c1229acd377f5cb5a2ed0a31db8a37febd94e..1fb192c9464fba19dc042d96667b42fb7752dee5 100755 (executable)
@@ -139,4 +139,6 @@ config MACH_RK3168_DS1006H
 config MACH_RK3168_86V
        bool "RK3168 86V Board"
 
+config MACH_RK3168_86V_OLD
+        bool "RK3168 86V  Old Board"
 endchoice
index 17a2f1d17d3207eea7e430627015b073286cefe4..6c1dee74bc973eb45c938c54d5f58bc65a0bfb32 100755 (executable)
@@ -45,4 +45,5 @@ obj-$(CONFIG_MACH_RK3168_TB) += board-rk3168-tb.o
 obj-$(CONFIG_MACH_RK3168_LR097) += board-rk3168-LR097.o
 obj-$(CONFIG_MACH_RK3168_DS1006H) += board-rk3168-ds1006h.o
 obj-$(CONFIG_MACH_RK3168_86V) += board-rk3168-86v.o
+obj-$(CONFIG_MACH_RK3168_86V_OLD) += board-rk3168-86v-old.o
 
diff --git a/arch/arm/mach-rk30/board-rk3168-86v-old-sdmmc-config.c b/arch/arm/mach-rk30/board-rk3168-86v-old-sdmmc-config.c
new file mode 100755 (executable)
index 0000000..b873bba
--- /dev/null
@@ -0,0 +1,160 @@
+/*****************************************************************************************
+ * arch/arm/mach-rkxx/baord-xxx-sdmmc-config.c
+ *
+ * Copyright (C) 2013 ROCKCHIP, Inc.
+ *
+ * Description: 
+ *     define the gpio for SD-MMC-SDIO-Wifi functions  according to your own projects.
+ *
+ * Author: Michael Xie
+ *         15 Jan,2013
+ * E-mail: xbw@rock-chips.com
+ *
+ ******************************************************************************************/
+
+/*
+** If you select the macro of CONFIG_SDMMC0_RK29_WRITE_PROTECT, You must define the following values.
+** Otherwise, there is no need to define the following values¡£
+*/
+//#define SDMMC0_WRITE_PROTECT_PIN                 RK30_PIN3_PB2       //According to your own project to set the value of write-protect-pin.
+//#define SDMMC0_WRITE_PROTECT_ENABLE_VALUE     GPIO_HIGH
+
+/*
+** If you select the macro of CONFIG_SDMMC1_RK29_WRITE_PROTECT, You must define the following values.
+** Otherwise, there is no need to define the following values¡£
+*/
+//#define SDMMC1_WRITE_PROTECT_PIN                 RK30_PIN3_PB3       //According to your own project to set the value of write-protect-pin.
+//#define SDMMC1_WRITE_PROTECT_ENABLE_VALUE     GPIO_HIGH
+    
+/*
+** If you select the macro of CONFIG_RK29_SDIO_IRQ_FROM_GPIO, You must define the following values.
+** Otherwise, there is no need to define the following values¡£
+*/
+//#define RK29SDK_WIFI_SDIO_CARD_INT         RK30_PIN3_PD2
+
+
+/*
+* define sdcard PowerEn-pin
+*/
+#define RK29SDK_SD_CARD_PWR_EN                  RK30_PIN3_PA1
+#define RK29SDK_SD_CARD_PWR_EN_LEVEL            GPIO_LOW 
+int rk31sdk_get_sdmmc0_pin_io_voltage(void)
+{
+    int voltage;
+#define RK31SDK_SET_SDMMC0_PIN_VOLTAGE
+
+    /**************************************************************************************
+    **  Please tell me how much voltage of your SDMMC0-pin in your project. 
+    **
+    **     ÀýÈç: ÓеÄÏîÄ¿£¬ËüµÄSDMMC0ËùÔÚµÄRKÖ÷¿ØµÄIO×飬ÏëÓÃ1.8V, ¶ø¿¨±¾ÉíÓÃ3.3V, 
+    **  ¶øÖмäͨ¹ý¸öµçƽת»».ÄÇô£¬Äú´Ëʱ£¬Ó¦¸ÃÉèÖÃÏÂÃæµÄvoltageֵΪ 1.8V(¼´1800mv)
+    ***************************************************************************************/
+    voltage = 3300;  //default the voltage 3300mv. 
+
+    return voltage;
+}
+
+/*
+* define the card-detect-pin.
+*/
+#define RK29SDK_SD_CARD_DETECT_N                RK30_PIN3_PB0  //According to your own project to set the value of card-detect-pin.
+#define RK29SDK_SD_CARD_INSERT_LEVEL            GPIO_LOW       // set the voltage of insert-card. Please pay attention to the default setting.
+
+/*
+* Define wifi module's power and reset gpio, and gpio sensitive level.
+* Please set the value according to your own project.
+*
+* Well, you just own engineering module to set the value in the corresponding module branch.
+* Otherwise, you do not define this macro, eliminate it.
+*
+*/          
+#if defined(CONFIG_RTL8192CU) || defined(CONFIG_RTL8188EU) 
+    #define RK30SDK_WIFI_GPIO_POWER_N               RK30_PIN0_PD5//RK30_PIN3_PD0            
+    #define RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE    GPIO_LOW//GPIO_HIGH        
+    
+#elif defined(CONFIG_BCM4329) || defined(CONFIG_BCM4319) || defined(CONFIG_RK903) || defined(CONFIG_RK901)
+    #define RK30SDK_WIFI_GPIO_POWER_N               RK30_PIN3_PD0                 
+    #define RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE    GPIO_HIGH                   
+
+    #define RK30SDK_WIFI_GPIO_RESET_N               RK30_PIN2_PA7
+    #define RK30SDK_WIFI_GPIO_RESET_ENABLE_VALUE    GPIO_HIGH 
+
+#elif defined(CONFIG_MT5931_MT6622) || defined(CONFIG_MT5931)
+
+       #ifdef  CONFIG_MACH_RK3168_LR097 
+       #define RK30SDK_WIFI_GPIO_POWER_N               RK30_PIN3_PD0 
+       #define RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE    GPIO_HIGH
+
+       //#define RK30SDK_WIFI_GPIO_RESET_N                 RK30_PIN3_PD1
+       //#define RK30SDK_WIFI_GPIO_RESET_ENABLE_VALUE    GPIO_HIGH
+
+       #else
+       #define RK30SDK_WIFI_GPIO_POWER_N               RK30_PIN0_PA5
+       #define RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE    GPIO_HIGH
+
+       #define RK30SDK_WIFI_GPIO_RESET_N               RK30_PIN3_PD1
+       #define RK30SDK_WIFI_GPIO_RESET_ENABLE_VALUE    GPIO_HIGH       
+       #endif
+
+#elif defined(CONFIG_MT6620)
+    #define COMBO_MODULE_MT6620_CDT    1  // to control antsel2,antsel3 and gps_lan foot when using AcSip or Cdtech chip. 
+                                             //- 1--use Cdtech chip; 0--unuse CDT chip
+
+    //power, PMU_EN
+    #define RK30SDK_WIFI_GPIO_POWER_N                   RK30_PIN3_PC7            
+    #define RK30SDK_WIFI_GPIO_POWER_ENABLE_VALUE        GPIO_HIGH        
+    //reset, DAIRST,SYSRST_B
+    #define RK30SDK_WIFI_GPIO_RESET_N                   RK30_PIN3_PD1
+    #define RK30SDK_WIFI_GPIO_RESET_ENABLE_VALUE        GPIO_HIGH 
+    //VDDIO
+    //#define RK30SDK_WIFI_GPIO_VCCIO_WL                  RK30_PIN0_PD2 //You do not get control of the foot, and you do not need to define the macro 
+    //#define RK30SDK_WIFI_GPIO_VCCIO_WL_ENABLE_VALUE     GPIO_HIGH
+    //WIFI_INT_B
+    #define RK30SDK_WIFI_GPIO_WIFI_INT_B                RK30_PIN3_PD2
+    #define RK30SDK_WIFI_GPIO_WIFI_INT_B_ENABLE_VALUE   GPIO_HIGH 
+    //BGF_INT_B
+    #define RK30SDK_WIFI_GPIO_BGF_INT_B                 RK30_PIN6_PA7
+    #define RK30SDK_WIFI_GPIO_BGF_INT_B_ENABLE_VALUE    GPIO_HIGH 
+    //GPS_SYNC
+    #define RK30SDK_WIFI_GPIO_GPS_SYNC                  RK30_PIN3_PD0
+    #define RK30SDK_WIFI_GPIO_GPS_SYNC_ENABLE_VALUE     GPIO_HIGH 
+
+    #if COMBO_MODULE_MT6620_CDT
+    //ANTSEL2
+    #define RK30SDK_WIFI_GPIO_ANTSEL2                   RK30_PIN4_PD4
+    #define RK30SDK_WIFI_GPIO_ANTSEL2_ENABLE_VALUE      GPIO_LOW    //use 6620 in CDT chip, LOW--work; High--no work.
+    //ANTSEL3
+    #define RK30SDK_WIFI_GPIO_ANTSEL3                   RK30_PIN4_PD3
+    #define RK30SDK_WIFI_GPIO_ANTSEL3_ENABLE_VALUE      GPIO_HIGH    //use 6620 in CDT chip, High--work; Low--no work..
+    //GPS_LAN
+    #define RK30SDK_WIFI_GPIO_GPS_LAN                   RK30_PIN4_PD6
+    #define RK30SDK_WIFI_GPIO_GPS_LAN_ENABLE_VALUE      GPIO_HIGH    //use 6620 in CDT chip, High--work; Low--no work..
+    #endif // #if COMBO_MODULE_MT6620_CDT--#endif
+#endif 
+
+int rk31sdk_get_sdio_wifi_voltage(void)
+{
+    int voltage;
+    
+    /******************************************************************************
+    **  Please tell me how much wifi-module uses voltage in your project.  
+    ******************************************************************************/
+#if defined(CONFIG_BCM4329) || defined(CONFIG_BCM4319) || defined(CONFIG_RK903) || defined(CONFIG_RK901)
+    voltage = 1800 ; //power 1800mV
+    
+#elif defined(CONFIG_MT5931_MT6622)||defined(CONFIG_MT5931)
+    voltage = 1800 ; //power 1800V
+#elif defined(CONFIG_MT6620) 
+    voltage = 2800 ; //power 2800V
+#elif defined(CONFIG_RDA5990)||defined(CONFIG_RTL8723AS)  
+    voltage = 3300 ; //power 3300V
+#else
+    //default, sdio use 3.0V
+    voltage = 3000 ; //power 3000V
+#endif
+
+    return voltage;
+}
+
+
+   
diff --git a/arch/arm/mach-rk30/board-rk3168-86v-old.c b/arch/arm/mach-rk30/board-rk3168-86v-old.c
new file mode 100755 (executable)
index 0000000..516b736
--- /dev/null
@@ -0,0 +1,1932 @@
+/*
+ *
+ * Copyright (C) 2012 ROCKCHIP, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/skbuff.h>
+#include <linux/spi/spi.h>
+#include <linux/mmc/host.h>
+#include <linux/ion.h>
+#include <linux/cpufreq.h>
+#include <linux/clk.h>
+#include <mach/dvfs.h>
+
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/flash.h>
+#include <asm/hardware/gic.h>
+
+#include <mach/board.h>
+#include <mach/hardware.h>
+#include <mach/io.h>
+#include <mach/gpio.h>
+#include <mach/iomux.h>
+#include <linux/rk_fb.h>
+#include <linux/regulator/machine.h>
+#include <linux/rfkill-rk.h>
+#include <linux/sensor-dev.h>
+#include <linux/mfd/tps65910.h>
+#include <linux/regulator/act8846.h>
+#include <linux/regulator/rk29-pwm-regulator.h>
+#if defined(CONFIG_CT36X_TS)
+#include <linux/ct36x.h>
+#endif
+#if defined(CONFIG_MFD_RK610)
+#include <linux/mfd/rk610_core.h>
+#endif
+
+#if defined(CONFIG_RK_HDMI)
+       #include "../../../drivers/video/rockchip/hdmi/rk_hdmi.h"
+#endif
+
+#if defined(CONFIG_SPIM_RK29)
+#include "../../../drivers/spi/rk29_spim.h"
+#endif
+#if defined(CONFIG_GPS_RK)
+#include "../../../drivers/misc/gps/rk_gps/rk_gps.h"
+#endif
+
+#if defined(CONFIG_MT6620)
+#include <linux/gps.h>
+#endif
+
+#include "board-rk3168-86v-camera.c"
+#include <plat/key.h>
+
+static struct rk29_keys_button key_button[] = {
+       {
+               .desc   = "play",
+               .code   = KEY_POWER,
+               .gpio   = RK30_PIN0_PA4, 
+               .active_low = PRESS_LEV_LOW,
+               .wakeup = 1,
+       },
+       {
+                .desc   = "vol-",
+                .code   = KEY_VOLUMEDOWN,
+                .adc_value      = 150,
+                .gpio   = INVALID_GPIO,
+                .active_low = PRESS_LEV_LOW,
+        },
+       {
+                .desc   = "vol+",
+                .code   = KEY_VOLUMEUP,
+                .adc_value      = 1,
+                .gpio = INVALID_GPIO,
+                .active_low = PRESS_LEV_LOW,
+        },
+};
+struct rk29_keys_platform_data rk29_keys_pdata = {
+       .buttons        = key_button,
+       .nbuttons       = ARRAY_SIZE(key_button),
+       .chn    = 1,  //chn: 0-7, if do not use ADC,set 'chn' -1
+};
+
+#if defined(CONFIG_CT36X_TS)
+
+#define TOUCH_MODEL            363
+#define TOUCH_MAX_X            1280
+#define TOUCH_MAX_y            800
+#define TOUCH_RESET_PIN                RK30_PIN0_PB6
+#define TOUCH_INT_PIN          RK30_PIN1_PB7
+
+static struct ct36x_platform_data ct36x_info = {
+       .model   = TOUCH_MODEL,
+       .x_max   = TOUCH_MAX_X,
+       .y_max   = TOUCH_MAX_y,
+
+       .rst_io = {
+               .gpio = TOUCH_RESET_PIN,
+               .active_low = 1,
+       },
+       .irq_io = {
+               .gpio = TOUCH_INT_PIN,
+               .active_low = 1,
+       },
+       .orientation = {1, 0, 1, 0},
+};
+#endif
+
+#if defined(CONFIG_TOUCHSCREEN_GSLX680)
+#define TOUCH_RESET_PIN RK30_PIN0_PB6
+#define TOUCH_EN_PIN NULL
+#define TOUCH_INT_PIN RK30_PIN1_PB7
+
+int gslx680_init_platform_hw(void)
+{
+
+       if(gpio_request(TOUCH_RESET_PIN,NULL) != 0){
+                gpio_free(TOUCH_RESET_PIN);
+                printk("gslx680_init_platform_hw gpio_request error\n");
+                return -EIO;
+        }
+        if(gpio_request(TOUCH_INT_PIN,NULL) != 0){
+                gpio_free(TOUCH_INT_PIN);
+                printk("gslx680_init_platform_hw  gpio_request error\n");
+                return -EIO;
+        }
+        gpio_direction_output(TOUCH_RESET_PIN, GPIO_HIGH);
+        mdelay(10);
+        gpio_set_value(TOUCH_RESET_PIN,GPIO_LOW);
+        mdelay(10);
+        gpio_set_value(TOUCH_RESET_PIN,GPIO_HIGH);
+        msleep(300);
+        return 0;
+
+}
+
+struct ts_hw_data     gslx680_info = {
+       .reset_gpio = TOUCH_RESET_PIN,
+       .touch_en_gpio = TOUCH_INT_PIN,
+       .init_platform_hw = gslx680_init_platform_hw,
+};
+#endif
+
+
+#if defined (CONFIG_TOUCHSCREEN_86V_GT811_IIC)
+#define TOUCH_RESET_PIN  RK30_PIN0_PB6
+#define TOUCH_INT_PIN    RK30_PIN1_PB7
+int gt811_init_platform_hw(void)
+{
+    if(gpio_request(TOUCH_RESET_PIN,NULL) != 0){
+      gpio_free(TOUCH_RESET_PIN);
+      printk("gt811_init_platform_hw gpio_request error\n");
+      return -EIO;
+    }
+
+    if(gpio_request(TOUCH_INT_PIN,NULL) != 0){
+      gpio_free(TOUCH_INT_PIN);
+      printk("gt811_init_platform_hw gpio_request error\n");
+      return -EIO;
+    }
+    //gpio_pull_updown(TOUCH_INT_PIN, 1);
+    gpio_direction_output(TOUCH_RESET_PIN, 0);
+    msleep(500);
+    gpio_set_value(TOUCH_RESET_PIN,GPIO_LOW);
+    msleep(500);
+    gpio_set_value(TOUCH_RESET_PIN,GPIO_HIGH);
+       mdelay(100);
+
+    return 0;
+}
+
+
+static struct goodix_platform_data gt811_info = {
+  .model= 811,
+  .init_platform_hw= gt811_init_platform_hw,
+
+};
+#endif
+static struct spi_board_info board_spi_devices[] = {
+};
+
+/***********************************************************
+*      rk30  backlight
+************************************************************/
+#ifdef CONFIG_BACKLIGHT_RK29_BL
+#define PWM_ID            3
+#define PWM_MODE         PWM3
+#define PWM_EFFECT_VALUE 0// 1
+
+#define LCD_DISP_ON_PIN
+
+#ifdef  LCD_DISP_ON_PIN
+#define BL_EN_PIN         RK30_PIN0_PA2
+#define BL_EN_VALUE       GPIO_HIGH
+#endif
+static int rk29_backlight_io_init(void)
+{
+       int ret = 0;
+
+       iomux_set(PWM_MODE);
+#ifdef  LCD_DISP_ON_PIN
+       ret = gpio_request(BL_EN_PIN, NULL);
+       if (ret != 0) {
+               gpio_free(BL_EN_PIN);
+       }
+
+       gpio_direction_output(BL_EN_PIN, 0);
+       gpio_set_value(BL_EN_PIN, BL_EN_VALUE);
+#endif
+
+       return ret;
+}
+
+static int rk29_backlight_io_deinit(void)
+{
+       int ret = 0, pwm_gpio;
+
+#ifdef  LCD_DISP_ON_PIN
+       gpio_free(BL_EN_PIN);
+#endif
+
+       pwm_gpio = iomux_mode_to_gpio(PWM_MODE);
+       gpio_request(pwm_gpio, NULL);
+       gpio_direction_output(pwm_gpio, GPIO_LOW);
+       return ret;
+}
+
+static int rk29_backlight_pwm_suspend(void)
+{
+       int ret = 0, pwm_gpio;
+
+       pwm_gpio = iomux_mode_to_gpio(PWM_MODE);
+       if (gpio_request(pwm_gpio, NULL)) {
+               printk("func %s, line %d: request gpio fail\n", __FUNCTION__, __LINE__);
+               return -1;
+       }
+       gpio_direction_output(pwm_gpio, GPIO_LOW);
+#ifdef  LCD_DISP_ON_PIN
+       gpio_direction_output(BL_EN_PIN, 0);
+       gpio_set_value(BL_EN_PIN, !BL_EN_VALUE);
+#endif
+       return ret;
+}
+
+static int rk29_backlight_pwm_resume(void)
+{
+       int pwm_gpio = iomux_mode_to_gpio(PWM_MODE);
+
+       gpio_free(pwm_gpio);
+       iomux_set(PWM_MODE);
+#ifdef  LCD_DISP_ON_PIN
+       msleep(130);
+       gpio_direction_output(BL_EN_PIN, 1);
+       gpio_set_value(BL_EN_PIN, BL_EN_VALUE);
+#endif
+       return 0;
+}
+
+static struct rk29_bl_info rk29_bl_info = {
+        .min_brightness = 30,
+        .max_brightness=255,
+        .brightness_mode =1,
+       .pre_div = 20 * 1000,  // pwm output clk: 20k;
+       .pwm_id = PWM_ID,
+       .bl_ref = PWM_EFFECT_VALUE,
+       .io_init = rk29_backlight_io_init,
+       .io_deinit = rk29_backlight_io_deinit,
+       .pwm_suspend = rk29_backlight_pwm_suspend,
+       .pwm_resume = rk29_backlight_pwm_resume,
+};
+
+static struct platform_device rk29_device_backlight = {
+       .name   = "rk29_backlight",
+       .id     = -1,
+       .dev    = {
+               .platform_data  = &rk29_bl_info,
+       }
+};
+
+#endif
+
+/*MMA8452 gsensor*/
+#if defined (CONFIG_GS_MMA8452)
+#define MMA8452_INT_PIN   RK30_PIN0_PB7
+
+static int mma8452_init_platform_hw(void)
+{
+       return 0;
+}
+
+static struct sensor_platform_data mma8452_info = {
+       .type = SENSOR_TYPE_ACCEL,
+       .irq_enable = 1,
+       .poll_delay_ms = 30,
+        .init_platform_hw = mma8452_init_platform_hw,
+        .orientation = {-1, 0, 0, 0, 0, 1, 0, 1, 0},
+};
+#endif
+
+/*MMA7660 gsensor*/
+#if defined (CONFIG_GS_MMA7660)
+#define MMA7660_INT_PIN   RK30_PIN0_PB7
+
+static int mma7660_init_platform_hw(void)
+{
+       //rk30_mux_api_set(GPIO1B2_SPI_RXD_UART1_SIN_NAME, GPIO1B_GPIO1B2);
+
+       return 0;
+}
+
+static struct sensor_platform_data mma7660_info = {
+       .type = SENSOR_TYPE_ACCEL,
+       .irq_enable = 1,
+       .poll_delay_ms = 30,
+    .init_platform_hw = mma7660_init_platform_hw,
+    .orientation = {0, -1, 0, 0, 0, -1, -1, 0, 0},
+      
+};
+#endif
+
+#if defined (CONFIG_GS_LIS3DH)
+#define LIS3DH_INT_PIN   RK30_PIN0_PB7
+
+static int lis3dh_init_platform_hw(void)
+{
+
+        return 0;
+}
+
+static struct sensor_platform_data lis3dh_info = {
+       .type = SENSOR_TYPE_ACCEL,
+       .irq_enable = 1,
+       .poll_delay_ms = 30,
+        .init_platform_hw = lis3dh_init_platform_hw,
+       .orientation = {-1, 0, 0, 0, 0, 1, 0, -1, 0},
+};
+#endif
+#if defined (CONFIG_COMPASS_AK8975)
+static struct sensor_platform_data akm8975_info =
+{
+       .type = SENSOR_TYPE_COMPASS,
+       .irq_enable = 1,
+       .poll_delay_ms = 30,
+       .m_layout = 
+       {
+               {
+                       {1, 0, 0},
+                       {0, 1, 0},
+                       {0, 0, 1},
+               },
+
+               {
+                       {1, 0, 0},
+                       {0, 1, 0},
+                       {0, 0, 1},
+               },
+
+               {
+                       {1, 0, 0},
+                       {0, 1, 0},
+                       {0, 0, 1},
+               },
+
+               {
+                       {1, 0, 0},
+                       {0, 1, 0},
+                       {0, 0, 1},
+               },
+       }
+};
+
+#endif
+
+#if defined(CONFIG_GYRO_L3G4200D)
+
+#include <linux/l3g4200d.h>
+#define L3G4200D_INT_PIN  RK30_PIN0_PB4
+
+static int l3g4200d_init_platform_hw(void)
+{
+       return 0;
+}
+
+static struct sensor_platform_data l3g4200d_info = {
+       .type = SENSOR_TYPE_GYROSCOPE,
+       .irq_enable = 1,
+       .poll_delay_ms = 30,
+       .orientation = {0, 1, 0, -1, 0, 0, 0, 0, 1},
+       .init_platform_hw = l3g4200d_init_platform_hw,
+       .x_min = 40,//x_min,y_min,z_min = (0-100) according to hardware
+       .y_min = 40,
+       .z_min = 20,
+};
+
+#endif
+
+#ifdef CONFIG_LS_CM3217
+static struct sensor_platform_data cm3217_info = {
+       .type = SENSOR_TYPE_LIGHT,
+       .irq_enable = 0,
+       .poll_delay_ms = 500,
+};
+
+#endif
+
+#ifdef CONFIG_FB_ROCKCHIP
+
+#define LCD_CS_PIN         INVALID_GPIO
+#define LCD_CS_VALUE       GPIO_HIGH
+
+#define LCD_EN_PIN         RK30_PIN0_PB0
+#define LCD_EN_VALUE       GPIO_LOW
+
+#define  LCD_STBYB_RXD_MODE        SPI1_RXD
+
+
+static int rk_fb_io_init(struct rk29_fb_setting_info *fb_setting)
+{
+       int ret = 0;
+       int stbyb_gpio;
+
+       if(LCD_CS_PIN !=INVALID_GPIO)
+       {
+               ret = gpio_request(LCD_CS_PIN, NULL);
+               if (ret != 0)
+               {
+                       gpio_free(LCD_CS_PIN);
+                       printk(KERN_ERR "request lcd cs pin fail!\n");
+                       return -1;
+               }
+               else
+               {
+                       gpio_direction_output(LCD_CS_PIN, LCD_CS_VALUE);
+               }
+       }
+
+       if(LCD_EN_PIN !=INVALID_GPIO)
+       {
+               ret = gpio_request(LCD_EN_PIN, NULL);
+               if (ret != 0)
+               {
+                       gpio_free(LCD_EN_PIN);
+                       printk(KERN_ERR "request lcd en pin fail!\n");
+                       return -1;
+               }
+               else
+               {
+                       gpio_direction_output(LCD_EN_PIN, LCD_EN_VALUE);
+               }
+       }
+
+       stbyb_gpio = iomux_mode_to_gpio(LCD_STBYB_RXD_MODE);
+       gpio_request(stbyb_gpio, "stbyb");
+       gpio_direction_output(stbyb_gpio, GPIO_HIGH);
+       gpio_set_value(stbyb_gpio,GPIO_HIGH);
+       
+       return 0;
+}
+static int rk_fb_io_disable(void)
+{
+       if(LCD_CS_PIN !=INVALID_GPIO)
+       {
+               gpio_set_value(LCD_CS_PIN, !LCD_CS_VALUE);
+       }
+       if(LCD_EN_PIN !=INVALID_GPIO)
+       {
+               gpio_set_value(LCD_EN_PIN, !LCD_EN_VALUE);
+       }
+       return 0;
+}
+static int rk_fb_io_enable(void)
+{
+       if(LCD_CS_PIN !=INVALID_GPIO)
+       {
+               gpio_set_value(LCD_CS_PIN, LCD_CS_VALUE);
+       }
+       if(LCD_EN_PIN !=INVALID_GPIO)
+       {
+               gpio_set_value(LCD_EN_PIN, LCD_EN_VALUE);
+       }
+       return 0;
+}
+
+#if defined(CONFIG_LCDC0_RK3066B)
+struct rk29fb_info lcdc0_screen_info = {
+       .prop      = EXTEND,            //primary display device
+       .io_init   = NULL,
+       .io_disable = NULL,
+       .io_enable = NULL,
+       .set_screen_info = NULL,
+};
+#endif
+
+#if defined(CONFIG_LCDC1_RK3066B)
+struct rk29fb_info lcdc1_screen_info = {
+       .prop      = PRMRY,             //primary display device
+       .io_init   = rk_fb_io_init,
+       .io_disable = rk_fb_io_disable,
+       .io_enable = rk_fb_io_enable,
+       .set_screen_info = set_lcd_info,
+       
+};
+#endif
+
+static struct resource resource_fb[] = {
+       [0] = {
+               .name  = "fb0 buf",
+               .start = 0,
+               .end   = 0,//RK30_FB0_MEM_SIZE - 1,
+               .flags = IORESOURCE_MEM,
+       },
+       [1] = {
+               .name  = "ipp buf",  //for rotate
+               .start = 0,
+               .end   = 0,//RK30_FB0_MEM_SIZE - 1,
+               .flags = IORESOURCE_MEM,
+       },
+       [2] = {
+               .name  = "fb2 buf",
+               .start = 0,
+               .end   = 0,//RK30_FB0_MEM_SIZE - 1,
+               .flags = IORESOURCE_MEM,
+       },
+};
+
+static struct platform_device device_fb = {
+       .name           = "rk-fb",
+       .id             = -1,
+       .num_resources  = ARRAY_SIZE(resource_fb),
+       .resource       = resource_fb,
+};
+#endif
+
+#if defined(CONFIG_LCDC0_RK3066B)
+static struct resource resource_lcdc0[] = {
+       [0] = {
+               .name  = "lcdc0 reg",
+               .start = RK30_LCDC0_PHYS,
+               .end   = RK30_LCDC0_PHYS + RK30_LCDC0_SIZE - 1,
+               .flags = IORESOURCE_MEM,
+       },
+       
+       [1] = {
+               .name  = "lcdc0 irq",
+               .start = IRQ_LCDC0,
+               .end   = IRQ_LCDC0,
+               .flags = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device device_lcdc0 = {
+       .name             = "rk30-lcdc",
+       .id               = 0,
+       .num_resources    = ARRAY_SIZE(resource_lcdc0),
+       .resource         = resource_lcdc0,
+       .dev            = {
+               .platform_data = &lcdc0_screen_info,
+       },
+};
+#endif
+#if defined(CONFIG_LCDC1_RK3066B) 
+static struct resource resource_lcdc1[] = {
+       [0] = {
+               .name  = "lcdc1 reg",
+               .start = RK30_LCDC1_PHYS,
+               .end   = RK30_LCDC1_PHYS + RK30_LCDC1_SIZE - 1,
+               .flags = IORESOURCE_MEM,
+       },
+       [1] = {
+               .name  = "lcdc1 irq",
+               .start = IRQ_LCDC1,
+               .end   = IRQ_LCDC1,
+               .flags = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device device_lcdc1 = {
+       .name             = "rk30-lcdc",
+       .id               = 1,
+       .num_resources    = ARRAY_SIZE(resource_lcdc1),
+       .resource         = resource_lcdc1,
+       .dev            = {
+               .platform_data = &lcdc1_screen_info,
+       },
+};
+#endif
+
+#if defined(CONFIG_MFD_RK610)
+#define RK610_RST_PIN                  RK30_PIN3_PB2
+static int rk610_power_on_init(void)
+{
+       int ret;
+       if(RK610_RST_PIN != INVALID_GPIO)
+       {
+               ret = gpio_request(RK610_RST_PIN, "rk610 reset");
+               if (ret)
+               {
+                       printk(KERN_ERR "rk610_control_probe request gpio fail\n");
+               }
+               else 
+               {
+                       gpio_direction_output(RK610_RST_PIN, GPIO_HIGH);
+                       msleep(100);
+                       gpio_direction_output(RK610_RST_PIN, GPIO_LOW);
+                       msleep(100);
+                       gpio_set_value(RK610_RST_PIN, GPIO_HIGH);
+               }
+       }
+
+       return 0;
+       
+}
+
+
+static struct rk610_ctl_platform_data rk610_ctl_pdata = {
+       .rk610_power_on_init = rk610_power_on_init,
+};
+#endif
+
+#ifdef CONFIG_SND_SOC_RK610
+static int rk610_codec_io_init(void)
+{
+//if need iomux.
+//Must not gpio_request
+       return 0;
+}
+
+static struct rk610_codec_platform_data rk610_codec_pdata = {
+       .spk_ctl_io = RK30_PIN2_PD7,
+       .io_init = rk610_codec_io_init,
+       .boot_depop = 1,
+};
+#endif
+
+#ifdef CONFIG_ION
+#define ION_RESERVE_SIZE        (80 * SZ_1M)
+static struct ion_platform_data rk30_ion_pdata = {
+       .nr = 1,
+       .heaps = {
+               {
+                       .type = ION_HEAP_TYPE_CARVEOUT,
+                       .id = ION_NOR_HEAP_ID,
+                       .name = "norheap",
+                       .size = ION_RESERVE_SIZE,
+               }
+       },
+};
+
+static struct platform_device device_ion = {
+       .name = "ion-rockchip",
+       .id = 0,
+       .dev = {
+               .platform_data = &rk30_ion_pdata,
+       },
+};
+#endif
+
+/**************************************************************************************************
+ * SDMMC devices,  include the module of SD,MMC,and sdio.noted by xbw at 2012-03-05
+**************************************************************************************************/
+#ifdef CONFIG_SDMMC_RK29
+#include "board-rk3168-86v-old-sdmmc-config.c"
+#include "../plat-rk/rk-sdmmc-ops.c"
+#include "../plat-rk/rk-sdmmc-wifi.c"
+#endif //endif ---#ifdef CONFIG_SDMMC_RK29
+
+#ifdef CONFIG_SDMMC0_RK29
+static int rk29_sdmmc0_cfg_gpio(void)
+{
+#ifdef CONFIG_SDMMC_RK29_OLD
+       iomux_set(MMC0_CMD);
+       iomux_set(MMC0_CLKOUT);
+       iomux_set(MMC0_D0);
+       iomux_set(MMC0_D1);
+       iomux_set(MMC0_D2);
+       iomux_set(MMC0_D3);
+
+       iomux_set_gpio_mode(iomux_mode_to_gpio(MMC0_DETN));
+
+       gpio_request(RK30_PIN3_PA7, "sdmmc-power");
+       gpio_direction_output(RK30_PIN3_PA7, GPIO_LOW);
+
+#else
+       rk29_sdmmc_set_iomux(0, 0xFFFF);
+
+    #if defined(CONFIG_SDMMC0_RK29_SDCARD_DET_FROM_GPIO)
+        #if SDMMC_USE_NEW_IOMUX_API
+        iomux_set_gpio_mode(iomux_gpio_to_mode(RK29SDK_SD_CARD_DETECT_N));
+        #else
+        rk30_mux_api_set(RK29SDK_SD_CARD_DETECT_PIN_NAME, RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO);
+        #endif
+    #else
+        #if SDMMC_USE_NEW_IOMUX_API       
+        iomux_set(MMC0_DETN);
+        #else
+        rk30_mux_api_set(RK29SDK_SD_CARD_DETECT_PIN_NAME, RK29SDK_SD_CARD_DETECT_IOMUX_FMUX);
+        #endif
+    #endif     
+
+#if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT)
+       gpio_request(SDMMC0_WRITE_PROTECT_PIN, "sdmmc-wp");
+       gpio_direction_input(SDMMC0_WRITE_PROTECT_PIN);
+#endif
+
+#endif
+
+       return 0;
+}
+
+#define CONFIG_SDMMC0_USE_DMA
+struct rk29_sdmmc_platform_data default_sdmmc0_data = {
+       .host_ocr_avail =
+           (MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 |
+            MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 |
+            MMC_VDD_33_34 | MMC_VDD_34_35 | MMC_VDD_35_36),
+       .host_caps =
+           (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
+       .io_init = rk29_sdmmc0_cfg_gpio,
+
+#if !defined(CONFIG_SDMMC_RK29_OLD)
+       .set_iomux = rk29_sdmmc_set_iomux,
+#endif
+
+       .dma_name = "sd_mmc",
+#ifdef CONFIG_SDMMC0_USE_DMA
+       .use_dma = 1,
+#else
+       .use_dma = 0,
+#endif
+
+#if defined(CONFIG_WIFI_COMBO_MODULE_CONTROL_FUNC) && defined(CONFIG_USE_SDMMC0_FOR_WIFI_DEVELOP_BOARD)
+    .status = rk29sdk_wifi_mmc0_status,
+    .register_status_notify = rk29sdk_wifi_mmc0_status_register,
+#endif
+
+#if defined(RK29SDK_SD_CARD_PWR_EN) || (INVALID_GPIO != RK29SDK_SD_CARD_PWR_EN)
+    .power_en = RK29SDK_SD_CARD_PWR_EN,
+    .power_en_level = RK29SDK_SD_CARD_PWR_EN_LEVEL,
+#else
+    .power_en = INVALID_GPIO,
+    .power_en_level = GPIO_LOW,
+#endif    
+       .enable_sd_wakeup = 0,
+
+#if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT)
+       .write_prt = SDMMC0_WRITE_PROTECT_PIN,
+       .write_prt_enalbe_level = SDMMC0_WRITE_PROTECT_ENABLE_VALUE;
+#else
+       .write_prt = INVALID_GPIO,
+#endif
+
+    .det_pin_info = {    
+    #if defined(RK29SDK_SD_CARD_DETECT_N) || (INVALID_GPIO != RK29SDK_SD_CARD_DETECT_N)  
+        .io             = RK29SDK_SD_CARD_DETECT_N, //INVALID_GPIO,
+        .enable         = RK29SDK_SD_CARD_INSERT_LEVEL,
+        #ifdef RK29SDK_SD_CARD_DETECT_PIN_NAME
+        .iomux          = {
+            .name       = RK29SDK_SD_CARD_DETECT_PIN_NAME,
+            #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO
+            .fgpio      = RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO,
+            #endif
+            #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FMUX
+            .fmux       = RK29SDK_SD_CARD_DETECT_IOMUX_FMUX,
+            #endif
+        },
+        #endif
+    #else
+        .io             = INVALID_GPIO,
+        .enable         = GPIO_LOW,
+    #endif    
+    }, 
+
+};
+#endif // CONFIG_SDMMC0_RK29
+
+#ifdef CONFIG_SDMMC1_RK29
+#define CONFIG_SDMMC1_USE_DMA
+static int rk29_sdmmc1_cfg_gpio(void)
+{
+#if defined(CONFIG_SDMMC_RK29_OLD)
+       iomux_set(MMC1_CMD);
+       iomux_set(MMC1_CLKOUT);
+       iomux_set(MMC1_D0);
+       iomux_set(MMC1_D1);
+       iomux_set(MMC1_D2);
+       iomux_set(MMC1_D3);
+#else
+
+#if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT)
+       gpio_request(SDMMC1_WRITE_PROTECT_PIN, "sdio-wp");
+       gpio_direction_input(SDMMC1_WRITE_PROTECT_PIN);
+#endif
+
+#endif
+
+       return 0;
+}
+
+struct rk29_sdmmc_platform_data default_sdmmc1_data = {
+       .host_ocr_avail =
+           (MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 |
+            MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 |
+            MMC_VDD_33_34),
+
+#if !defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD)
+       .host_caps = (MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ |
+                     MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
+#else
+       .host_caps =
+           (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
+#endif
+
+       .io_init = rk29_sdmmc1_cfg_gpio,
+
+#if !defined(CONFIG_SDMMC_RK29_OLD)
+       .set_iomux = rk29_sdmmc_set_iomux,
+#endif
+
+       .dma_name = "sdio",
+#ifdef CONFIG_SDMMC1_USE_DMA
+       .use_dma = 1,
+#else
+       .use_dma = 0,
+#endif
+
+#if defined(CONFIG_WIFI_CONTROL_FUNC) || defined(CONFIG_WIFI_COMBO_MODULE_CONTROL_FUNC)
+    .status = rk29sdk_wifi_status,
+    .register_status_notify = rk29sdk_wifi_status_register,
+#endif
+
+#if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT)
+       .write_prt = SDMMC1_WRITE_PROTECT_PIN,
+           .write_prt_enalbe_level = SDMMC1_WRITE_PROTECT_ENABLE_VALUE;
+#else
+       .write_prt = INVALID_GPIO,
+#endif
+
+    #if defined(CONFIG_RK29_SDIO_IRQ_FROM_GPIO)
+        .sdio_INT_gpio = RK29SDK_WIFI_SDIO_CARD_INT,
+    #endif
+
+    .det_pin_info = {    
+#if defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD)
+     #if defined(RK29SDK_SD_CARD_DETECT_N) || (INVALID_GPIO != RK29SDK_SD_CARD_DETECT_N)  
+        .io             = RK29SDK_SD_CARD_DETECT_N,
+     #else
+         .io             = INVALID_GPIO,
+     #endif   
+
+        .enable         = RK29SDK_SD_CARD_INSERT_LEVEL,
+        #ifdef RK29SDK_SD_CARD_DETECT_PIN_NAME
+        .iomux          = {
+            .name       = RK29SDK_SD_CARD_DETECT_PIN_NAME,
+            #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO
+            .fgpio      = RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO,
+            #endif
+            #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FMUX
+            .fmux       = RK29SDK_SD_CARD_DETECT_IOMUX_FMUX,
+            #endif
+        },
+        #endif
+ #else
+        .io             = INVALID_GPIO,
+        .enable         = GPIO_LOW,
+#endif
+    },
+   
+       .enable_sd_wakeup = 0,
+};
+#endif //endif--#ifdef CONFIG_SDMMC1_RK29
+
+/**************************************************************************************************
+ * the end of setting for SDMMC devices
+**************************************************************************************************/
+
+#ifdef CONFIG_BATTERY_RK30_ADC_FAC
+static struct rk30_adc_battery_platform_data rk30_adc_battery_platdata = {
+        .dc_det_pin      = RK30_PIN0_PB2,
+        .batt_low_pin    = INVALID_GPIO, 
+        .charge_set_pin  = INVALID_GPIO,
+        .charge_ok_pin   = RK30_PIN0_PA6,
+        .usb_det_pin = INVALID_GPIO,
+        .dc_det_level    = GPIO_LOW,
+        .charge_ok_level = GPIO_HIGH,
+
+       .reference_voltage = 1800, // the rK2928 is 3300;RK3066 and rk29 are 2500;rk3066B is 1800;
+       .pull_up_res = 200,     //divider resistance ,  pull-up resistor
+       .pull_down_res = 120, //divider resistance , pull-down resistor
+
+       .is_reboot_charging = 1,
+        .save_capacity   = 1 ,
+        .low_voltage_protection = 3600,    
+};
+
+static struct platform_device rk30_device_adc_battery = {
+        .name   = "rk30-battery",
+        .id     = -1,
+        .dev = {
+                .platform_data = &rk30_adc_battery_platdata,
+        },
+};
+#endif
+#ifdef CONFIG_RK30_PWM_REGULATOR
+static int pwm_voltage_map[] = {
+       800000,825000,850000, 875000,900000, 925000 ,950000, 975000,1000000, 1025000, 1050000, 1075000, 1100000, 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000, 1325000, 1350000,1375000
+};
+
+static struct regulator_consumer_supply pwm_dcdc1_consumers[] = {
+       {
+               .supply = "vdd_cpu",
+       }
+};
+
+struct regulator_init_data pwm_regulator_init_dcdc[1] =
+{
+       {
+               .constraints = {
+                       .name = "PWM_DCDC1",
+                       .min_uV = 600000,
+                       .max_uV = 1800000,      //0.6-1.8V
+                       .apply_uV = true,
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+               },
+               .num_consumer_supplies = ARRAY_SIZE(pwm_dcdc1_consumers),
+               .consumer_supplies = pwm_dcdc1_consumers,
+       },
+};
+
+static struct pwm_platform_data pwm_regulator_info[1] = {
+       {
+               .pwm_id = 1,
+               .pwm_gpio = RK30_PIN3_PD4,
+               .pwm_iomux_pwm = PWM1,
+               .pwm_iomux_gpio = GPIO3_D4,
+               .pwm_voltage = 1100000,
+               .suspend_voltage = 1000000,
+               .min_uV = 800000,
+               .max_uV = 1375000,
+               .coefficient = 575,     //55.0%
+               .pwm_voltage_map = pwm_voltage_map,
+               .init_data      = &pwm_regulator_init_dcdc[0],
+       },
+};
+
+struct platform_device pwm_regulator_device[1] = {
+       {
+               .name = "pwm-voltage-regulator",
+               .id = 0,
+               .dev            = {
+                       .platform_data = &pwm_regulator_info[0],
+               }
+       },
+};
+#endif
+
+#ifdef CONFIG_RFKILL_RK
+// bluetooth rfkill device, its driver in net/rfkill/rfkill-rk.c
+static struct rfkill_rk_platform_data rfkill_rk_platdata = {
+    .type               = RFKILL_TYPE_BLUETOOTH,
+
+    .poweron_gpio       = { // BT_REG_ON
+        .io             = INVALID_GPIO, //RK30_PIN3_PC7,
+        .enable         = GPIO_HIGH,
+        .iomux          = {
+            .name       = "bt_poweron",
+            .fgpio      = GPIO3_C7,
+        },
+    },
+
+    .reset_gpio         = { // BT_RST
+        .io             = RK30_PIN3_PD1, // set io to INVALID_GPIO for disable it
+        .enable         = GPIO_LOW,
+        .iomux          = {
+            .name       = "bt_reset",
+            .fgpio      = GPIO3_D1,
+       },
+   }, 
+
+    .wake_gpio          = { // BT_WAKE, use to control bt's sleep and wakeup
+        .io             = RK30_PIN3_PC6, // set io to INVALID_GPIO for disable it
+        .enable         = GPIO_HIGH,
+        .iomux          = {
+            .name       = "bt_wake",
+            .fgpio      = GPIO3_C6,
+        },
+    },
+
+    .wake_host_irq      = { // BT_HOST_WAKE, for bt wakeup host when it is in deep sleep
+        .gpio           = {
+            .io         = RK30_PIN0_PA5, // set io to INVALID_GPIO for disable it
+            .enable     = GPIO_LOW,      // set GPIO_LOW for falling, set 0 for rising
+            .iomux      = {
+                .name   = NULL,
+            },
+        },
+    },
+
+    .rts_gpio           = { // UART_RTS, enable or disable BT's data coming
+        .io             = RK30_PIN1_PA3, // set io to INVALID_GPIO for disable it
+        .enable         = GPIO_LOW,
+        .iomux          = {
+            .name       = "bt_rts",
+            .fgpio      = GPIO1_A3,
+            .fmux       = UART0_RTSN,
+        },
+    },
+};
+
+static struct platform_device device_rfkill_rk = {
+    .name   = "rfkill_rk",
+    .id     = -1,
+    .dev    = {
+        .platform_data = &rfkill_rk_platdata,
+    },
+};
+#endif
+
+#if defined(CONFIG_GPS_RK)
+int rk_gps_io_init(void)
+{
+       printk("%s \n", __FUNCTION__);
+       
+       rk30_mux_api_set(GPIO1B5_UART3RTSN_NAME, GPIO1B_GPIO1B5);//VCC_EN
+       gpio_request(RK30_PIN1_PB5, NULL);
+       gpio_direction_output(RK30_PIN1_PB5, GPIO_LOW);
+
+       rk30_mux_api_set(GPIO1B4_UART3CTSN_GPSRFCLK_NAME, GPIO1B_GPSRFCLK);//GPS_CLK
+       rk30_mux_api_set(GPIO1B2_UART3SIN_GPSMAG_NAME, GPIO1B_GPSMAG);//GPS_MAG
+       rk30_mux_api_set(GPIO1B3_UART3SOUT_GPSSIG_NAME, GPIO1B_GPSSIG);//GPS_SIGN
+
+       rk30_mux_api_set(GPIO1A6_UART1CTSN_SPI0CLK_NAME, GPIO1A_GPIO1A6);//SPI_CLK
+       gpio_request(RK30_PIN1_PA6, NULL);
+       gpio_direction_output(RK30_PIN1_PA6, GPIO_LOW);
+
+       rk30_mux_api_set(GPIO1A5_UART1SOUT_SPI0TXD_NAME, GPIO1A_GPIO1A5);//SPI_MOSI
+       gpio_request(RK30_PIN1_PA5, NULL);
+       gpio_direction_output(RK30_PIN1_PA5, GPIO_LOW); 
+
+       rk30_mux_api_set(GPIO1A7_UART1RTSN_SPI0CSN0_NAME, GPIO1A_GPIO1A7);//SPI_CS
+       gpio_request(RK30_PIN1_PA7, NULL);
+       gpio_direction_output(RK30_PIN1_PA7, GPIO_LOW);         
+       return 0;
+}
+int rk_gps_power_up(void)
+{
+       printk("%s \n", __FUNCTION__);
+
+       return 0;
+}
+
+int rk_gps_power_down(void)
+{
+       printk("%s \n", __FUNCTION__);
+
+       return 0;
+}
+
+int rk_gps_reset_set(int level)
+{
+       return 0;
+}
+int rk_enable_hclk_gps(void)
+{
+       printk("%s \n", __FUNCTION__);
+       clk_enable(clk_get(NULL, "hclk_gps"));
+       return 0;
+}
+int rk_disable_hclk_gps(void)
+{
+       printk("%s \n", __FUNCTION__);
+       clk_disable(clk_get(NULL, "hclk_gps"));
+       return 0;
+}
+struct rk_gps_data rk_gps_info = {
+       .io_init = rk_gps_io_init,
+       .power_up = rk_gps_power_up,
+       .power_down = rk_gps_power_down,
+       .reset = rk_gps_reset_set,
+       .enable_hclk_gps = rk_enable_hclk_gps,
+       .disable_hclk_gps = rk_disable_hclk_gps,
+       .GpsSign = RK30_PIN1_PB3,
+       .GpsMag = RK30_PIN1_PB2,        //GPIO index
+       .GpsClk = RK30_PIN1_PB4,        //GPIO index
+       .GpsVCCEn = RK30_PIN1_PB5,     //GPIO index
+       .GpsSpi_CSO = RK30_PIN1_PA4,    //GPIO index
+       .GpsSpiClk = RK30_PIN1_PA5,     //GPIO index
+       .GpsSpiMOSI = RK30_PIN1_PA7,      //GPIO index
+       .GpsIrq = IRQ_GPS,
+       .GpsSpiEn = 0,
+       .GpsAdcCh = 2,
+       .u32GpsPhyAddr = RK30_GPS_PHYS,
+       .u32GpsPhySize = RK30_GPS_SIZE,
+};
+
+struct platform_device rk_device_gps = {
+       .name = "gps_hv5820b",
+       .id = -1,
+       .dev            = {
+       .platform_data = &rk_gps_info,
+               }
+       };
+#endif
+
+#if defined(CONFIG_MT5931_MT6622)
+static struct mt6622_platform_data mt6622_platdata = {
+                   .power_gpio         = { // BT_REG_ON
+                       .io             = RK30_PIN3_PD5, // set io to INVALID_GPIO for disable it
+                           .enable         = GPIO_HIGH,
+                           .iomux          = {
+                                   .name       = NULL,
+                               },
+                   },
+
+                   .reset_gpio         = { // BT_RST
+                       .io             = RK30_PIN0_PD7,
+                       .enable         = GPIO_HIGH,
+                       .iomux          = {
+                           .name       = NULL,
+                       },
+                   },
+
+                   .irq_gpio           = {
+                           .io             = RK30_PIN3_PD2,
+                           .enable         = GPIO_HIGH,
+                           .iomux          = {
+                                   .name       = NULL,
+                               },
+                   }
+};
+
+static struct platform_device device_mt6622 = {
+                   .name   = "mt6622",
+                       .id     = -1,
+                       .dev    = {
+                              .platform_data = &mt6622_platdata,
+                       },
+};     
+#endif
+
+static struct platform_device *devices[] __initdata = {
+
+#ifdef CONFIG_ION
+       &device_ion,
+#endif
+#ifdef CONFIG_WIFI_CONTROL_FUNC
+       &rk29sdk_wifi_device,
+#endif
+
+#if defined(CONFIG_MT6620)
+           &mt3326_device_gps,
+#endif
+
+#ifdef CONFIG_BATTERY_RK30_ADC_FAC
+       &rk30_device_adc_battery,
+#endif
+#ifdef CONFIG_RFKILL_RK
+       &device_rfkill_rk,
+#endif
+#ifdef CONFIG_GPS_RK
+       &rk_device_gps,
+#endif
+#ifdef CONFIG_MT5931_MT6622
+       &device_mt6622,
+#endif
+};
+
+
+static int rk_platform_add_display_devices(void)
+{
+       struct platform_device *fb = NULL;  //fb
+       struct platform_device *lcdc0 = NULL; //lcdc0
+       struct platform_device *lcdc1 = NULL; //lcdc1
+       struct platform_device *bl = NULL; //backlight
+#ifdef CONFIG_FB_ROCKCHIP
+       fb = &device_fb;
+#endif
+
+#if defined(CONFIG_LCDC0_RK3066B)
+       lcdc0 = &device_lcdc0,
+#endif
+
+#if defined(CONFIG_LCDC1_RK3066B)
+       lcdc1 = &device_lcdc1,
+#endif
+
+#ifdef CONFIG_BACKLIGHT_RK29_BL
+       bl = &rk29_device_backlight,
+#endif
+       __rk_platform_add_display_devices(fb,lcdc0,lcdc1,bl);
+
+       return 0;
+       
+}
+
+// i2c
+#ifdef CONFIG_I2C0_RK30
+static struct i2c_board_info __initdata i2c0_info[] = {
+#if defined (CONFIG_GS_MMA7660)
+       {
+               .type           = "gs_mma7660",//gs_mma7660
+               .addr           = 0x4c,
+               .flags          = 0,
+               .irq            = MMA7660_INT_PIN,
+               .platform_data = &mma7660_info,
+       },
+#endif
+#if defined (CONFIG_GS_MMA8452)
+       {
+               .type           = "gs_mma8452",
+               .addr           = 0x1d,
+               .flags          = 0,
+               .irq            = MMA8452_INT_PIN,
+               .platform_data = &mma8452_info,
+       },
+#endif
+#if defined (CONFIG_GS_LIS3DH)
+       {
+               .type           = "gs_lis3dh",
+               .addr           = 0x19,   //0x19(SA0-->VCC), 0x18(SA0-->GND)
+               .flags          = 0,
+               .irq            = LIS3DH_INT_PIN,
+               .platform_data = &lis3dh_info,
+       },
+#endif
+#if defined (CONFIG_COMPASS_AK8975)
+       {
+               .type          = "ak8975",
+               .addr          = 0x0d,
+               .flags         = 0,
+               .irq           = RK30_PIN3_PD7, 
+               .platform_data = &akm8975_info,
+               .irq           = RK30_PIN3_PD7, 
+               .platform_data = &akm8975_info,
+       },
+#endif
+#if defined (CONFIG_GYRO_L3G4200D)
+       {
+               .type          = "l3g4200d_gryo",
+               .addr          = 0x69,
+               .flags         = 0,
+               .irq           = L3G4200D_INT_PIN,
+               .platform_data = &l3g4200d_info,
+       },
+#endif
+#if defined (CONFIG_SND_SOC_RK1000)
+       {
+               .type          = "rk1000_i2c_codec",
+               .addr          = 0x60,
+               .flags         = 0,
+       },
+       {
+               .type          = "rk1000_control",
+               .addr          = 0x40,
+               .flags         = 0,
+       },
+#endif
+#if defined (CONFIG_SND_SOC_RT5631)
+        {
+                .type                   = "rt5631",
+                .addr                   = 0x1a,
+                .flags                  = 0,
+        },
+#endif
+};
+#endif
+
+int __sramdata g_pmic_type =  0;
+#ifdef CONFIG_I2C1_RK30
+#ifdef CONFIG_REGULATOR_ACT8846
+#define PMU_POWER_SLEEP RK30_PIN0_PA1
+#define ACT8846_HOST_IRQ                RK30_PIN0_PB3
+
+static struct pmu_info  act8846_dcdc_info[] = {
+       {
+               .name          = "act_dcdc1",   //ddr
+               .min_uv          = 1200000,
+               .max_uv         = 1200000,
+               .suspend_vol  =   1200000,
+       },
+       {
+               .name          = "vdd_core",    //logic
+               .min_uv          = 1000000,
+               .max_uv         = 1000000,
+               .suspend_vol  =  900000,
+       },
+       {
+               .name          = "vdd_cpu",   //arm
+               .min_uv          = 1000000,
+               .max_uv         = 1000000,
+               .suspend_vol  =  900000,
+       },
+       {
+               .name          = "act_dcdc4",   //vccio
+               .min_uv          = 3000000,
+               .max_uv         = 3000000,
+               .suspend_vol  =  2800000,
+       },
+       
+};
+static  struct pmu_info  act8846_ldo_info[] = {
+       {
+               .name          = "act_ldo1",   //vdd10
+               .min_uv          = 1000000,
+               .max_uv         = 1000000,
+       },
+       {
+               .name          = "act_ldo2",    //vdd12
+               .min_uv          = 1200000,
+               .max_uv         = 1200000,
+       },
+       {
+               .name          = "act_ldo3",   //vcc18_cif
+               .min_uv          = 1800000,
+               .max_uv         = 1800000,
+       },
+       {
+               .name          = "act_ldo4",   //vcca33
+               .min_uv          = 3300000,
+               .max_uv         = 3300000,
+       },
+       {
+               .name          = "act_ldo5",   //vcctp
+               .min_uv          = 3300000,
+               .max_uv         = 3300000,
+       },
+       {
+               .name          = "act_ldo6",   //vcc_jetta
+               .min_uv          = 3300000,
+               .max_uv         = 3300000,
+       },
+       {
+               .name          = "act_ldo7",   //vcc18
+               .min_uv          = 1800000,
+               .max_uv         = 1800000,
+       },
+       {
+               .name          = "act_ldo8",   //vcc28_cif
+               .min_uv          = 2800000,
+               .max_uv         = 2800000,
+       },
+ };
+
+#include "board-pmu-act8846.c"
+#endif
+
+#ifdef CONFIG_MFD_WM831X_I2C
+#define PMU_POWER_SLEEP                RK30_PIN0_PA1 
+
+static struct pmu_info  wm8326_dcdc_info[] = {
+       {
+               .name          = "vdd_core",   //logic
+               .min_uv          = 1000000,
+               .max_uv         = 1000000,
+               .suspend_vol  =  950000,
+       },
+       {
+               .name          = "vdd_cpu",    //arm
+               .min_uv          = 1000000,
+               .max_uv         = 1000000,
+               .suspend_vol  =  950000,
+       },
+       {
+               .name          = "dcdc3",   //ddr
+               .min_uv          = 1150000,
+               .max_uv         = 1150000,
+               .suspend_vol  =  1150000,
+       },
+       #ifdef CONFIG_MACH_RK3066_SDK
+       {
+               .name          = "dcdc4",   //vcc_io
+               .min_uv          = 3300000,
+               .max_uv         = 3300000,
+               .suspend_vol  =  3000000,
+       },
+       #else
+       {
+               .name          = "dcdc4",   //vcc_io
+               .min_uv          = 3000000,
+               .max_uv         = 3000000,
+               .suspend_vol  =  2800000,
+       },
+       #endif
+};
+
+static struct pmu_info  wm8326_ldo_info[] = {
+       {
+               .name          = "ldo1",   //vcc18_cif
+               .min_uv          = 1800000,
+               .max_uv         = 1800000,
+               .suspend_vol  =  1800000,
+       },
+       {
+               .name          = "ldo2",    //vccio_wl
+               .min_uv          = 1800000,
+               .max_uv         = 1800000,
+               .suspend_vol  =  1800000,
+       },
+       {
+               .name          = "ldo3",   //
+               .min_uv          = 1100000,
+               .max_uv         = 1100000,
+               .suspend_vol  =  1100000,
+       },
+       {
+               .name          = "ldo4",   //vdd11
+               .min_uv          = 1000000,
+               .max_uv         = 1000000,
+               .suspend_vol  =  1000000,
+       },
+       {
+               .name          = "ldo5",   //vcc25
+               .min_uv          = 1800000,
+               .max_uv         = 1800000,
+               .suspend_vol  =  1800000,
+       },
+       {
+               .name          = "ldo6",   //vcc33
+               .min_uv          = 3300000,
+               .max_uv         = 3300000,
+               .suspend_vol  =  3300000,
+       },
+       {
+               .name          = "ldo7",   //vcc28_cif
+               .min_uv          = 2800000,
+               .max_uv         = 2800000,
+               .suspend_vol  =  2800000,
+       },
+       {
+               .name          = "ldo8",   //vcca33
+               .min_uv          = 3300000,
+               .max_uv         = 3300000,
+               .suspend_vol  =  3300000,
+       },
+       {
+               .name          = "ldo9",   //vcc_tp
+               .min_uv          = 3300000,
+               .max_uv         = 3300000,
+               .suspend_vol  =  3300000,
+       },
+       {
+               .name          = "ldo10",   //flash_io
+               .min_uv          = 1800000,
+               .max_uv         = 1800000,
+               .suspend_vol  =  1800000,
+       },
+};
+
+#include "board-pmu-wm8326.c"
+#endif
+
+#ifdef CONFIG_MFD_TPS65910
+#ifdef CONFIG_ARCH_RK3066B
+#define TPS65910_HOST_IRQ        RK30_PIN0_PB3
+#else
+#define TPS65910_HOST_IRQ        RK30_PIN6_PA4
+#endif
+
+#define PMU_POWER_SLEEP RK30_PIN0_PA1
+
+static struct pmu_info  tps65910_dcdc_info[] = {
+       {
+               .name          = "vdd_core",   //logic
+               .min_uv          = 1100000,
+               .max_uv         = 1100000,
+       },
+       {
+               .name          = "vdd2",    //ddr
+               .min_uv          = 1200000,
+               .max_uv         = 1200000,
+       },
+       {
+               .name          = "vio",   //vcc_io
+               .min_uv          = 3000000,
+               .max_uv         = 3000000,
+       },
+       
+};
+static  struct pmu_info  tps65910_ldo_info[] = {
+       {
+               .name          = "vpll",   //vdd10
+               .min_uv          = 1000000,
+               .max_uv         = 1000000,
+       },
+       {
+               .name          = "vdig1",    //vcc18_cif
+               .min_uv          = 1800000,
+               .max_uv         = 1800000,
+       },
+       {
+               .name          = "vdig2",   //vdd_jetta
+               .min_uv          = 1200000,
+               .max_uv         = 1200000,
+       },
+       {
+               .name          = "vaux1",   //vcc28_cif
+               .min_uv          = 2800000,
+               .max_uv         = 2800000,
+       },
+       {
+               .name          = "vaux2",   //vcca33
+               .min_uv          = 3300000,
+               .max_uv         = 3300000,
+       },
+       {
+               .name          = "vaux33",   //vcc_tp
+               .min_uv          = 3300000,
+               .max_uv         = 3300000,
+       },
+       {
+               .name          = "vmmc",   //vcc30
+               .min_uv          = 3000000,
+               .max_uv         = 3000000,
+       },
+       {
+               .name          = "vdac",   //vcc18
+               .min_uv          = 1800000,
+               .max_uv         = 1800000,
+       },
+ };
+
+#include "board-pmu-tps65910.c"
+#endif
+
+static struct i2c_board_info __initdata i2c1_info[] = {
+#if defined (CONFIG_REGULATOR_ACT8846)
+       {
+               .type                   = "act8846",
+               .addr           = 0x5a, 
+               .flags                  = 0,
+               .irq            = ACT8846_HOST_IRQ,
+               .platform_data=&act8846_data,
+       },
+#endif
+#if defined (CONFIG_RTC_HYM8563)
+       {
+               .type                   = "rtc_hym8563",
+               .addr           = 0x51,
+               .flags                  = 0,
+               .irq            = RK30_PIN0_PB5,
+       },
+#endif
+#if defined (CONFIG_MFD_WM831X_I2C)
+       {
+               .type          = "wm8326",
+               .addr          = 0x34,
+               .flags         = 0,
+               .irq           = RK30_PIN0_PB3,
+               .platform_data = &wm831x_platdata,
+       },
+#endif
+#if defined (CONFIG_MFD_TPS65910)
+       {
+        .type           = "tps65910",
+        .addr           = TPS65910_I2C_ID0,
+        .flags          = 0,
+        .irq            = TPS65910_HOST_IRQ,
+       .platform_data = &tps65910_data,
+       },
+#endif
+};
+#endif
+
+void __sramfunc board_pmu_suspend(void)
+{      
+        #if defined (CONFIG_REGULATOR_ACT8846)
+       if(pmic_is_act8846())
+       board_pmu_act8846_suspend(); 
+       #endif
+       #if defined (CONFIG_MFD_WM831X_I2C)
+       if(pmic_is_wm8326())
+       board_pmu_wm8326_suspend();
+       #endif
+       #if defined (CONFIG_MFD_TPS65910)
+       if(pmic_is_tps65910())
+       board_pmu_tps65910_suspend(); 
+    #endif   
+}
+
+void __sramfunc board_pmu_resume(void)
+{      
+        #if defined (CONFIG_REGULATOR_ACT8846)
+       if(pmic_is_act8846())
+       board_pmu_act8846_resume(); 
+       #endif
+       #if defined (CONFIG_MFD_WM831X_I2C)
+       if(pmic_is_wm8326())
+       board_pmu_wm8326_resume();
+       #endif
+       #if defined (CONFIG_MFD_TPS65910)
+       if(pmic_is_tps65910())
+       board_pmu_tps65910_resume(); 
+       #endif
+}
+
+ int __sramdata gpio3d6_iomux,gpio3d6_do,gpio3d6_dir,gpio3d6_en;
+
+#define grf_readl(offset)      readl_relaxed(RK30_GRF_BASE + offset)
+#define grf_writel(v, offset)  do { writel_relaxed(v, RK30_GRF_BASE + offset); dsb(); } while (0)
+void __sramfunc rk30_pwm_logic_suspend_voltage(void)
+{
+#ifdef CONFIG_RK30_PWM_REGULATOR
+
+//     int gpio0d7_iomux,gpio0d7_do,gpio0d7_dir,gpio0d7_en;
+       sram_udelay(10000);
+       gpio3d6_iomux = grf_readl(GRF_GPIO3D_IOMUX);
+       gpio3d6_do = grf_readl(GRF_GPIO3H_DO);
+       gpio3d6_dir = grf_readl(GRF_GPIO3H_DIR);
+       gpio3d6_en = grf_readl(GRF_GPIO3H_EN);
+
+       grf_writel((1<<28), GRF_GPIO3D_IOMUX);
+       grf_writel((1<<30)|(1<<14), GRF_GPIO3H_DIR);
+       grf_writel((1<<30)|(1<<14), GRF_GPIO3H_DO);
+       grf_writel((1<<30)|(1<<14), GRF_GPIO3H_EN);
+#endif 
+}
+void __sramfunc rk30_pwm_logic_resume_voltage(void)
+{
+#ifdef CONFIG_RK30_PWM_REGULATOR
+       grf_writel((1<<28)|gpio3d6_iomux, GRF_GPIO3D_IOMUX);
+       grf_writel((1<<30)|gpio3d6_en, GRF_GPIO3H_EN);
+       grf_writel((1<<30)|gpio3d6_dir, GRF_GPIO3H_DIR);
+       grf_writel((1<<30)|gpio3d6_do, GRF_GPIO3H_DO);
+       sram_udelay(10000);
+
+#endif
+
+}
+extern void pwm_suspend_voltage(void);
+extern void pwm_resume_voltage(void);
+void  rk30_pwm_suspend_voltage_set(void)
+{
+#ifdef CONFIG_RK30_PWM_REGULATOR
+       pwm_suspend_voltage();
+#endif
+}
+void  rk30_pwm_resume_voltage_set(void)
+{
+#ifdef CONFIG_RK30_PWM_REGULATOR
+       pwm_resume_voltage();
+#endif
+}
+
+
+#ifdef CONFIG_I2C2_RK30
+static struct i2c_board_info __initdata i2c2_info[] = {
+#if defined (CONFIG_CT36X_TS)
+       {
+               .type          = CT36X_NAME,
+               .addr          = 0x01,
+               .flags         = 0,
+               .platform_data = &ct36x_info,
+       },
+#endif
+#if defined (CONFIG_LS_CM3217)
+       {
+               .type          = "lightsensor",
+               .addr          = 0x10,
+               .flags         = 0,
+               .platform_data = &cm3217_info,
+       },
+#endif
+#if defined (CONFIG_TOUCHSCREEN_GSLX680)
+    {
+        .type           = "gslX680",
+        .addr           = 0x40,
+        .flags          = 0,
+        .platform_data =&gslx680_info,
+    },
+#endif
+#if defined (CONFIG_TOUCHSCREEN_86V_GT811_IIC) 
+{              
+       .type          = "gt811_ts",            
+       .addr          = 0x5d,          
+       .flags         = 0,             
+       .irq           = TOUCH_INT_PIN,         
+       .platform_data = &gt811_info,   
+},
+#endif
+};
+#endif
+
+#ifdef CONFIG_I2C3_RK30
+static struct i2c_board_info __initdata i2c3_info[] = {
+};
+#endif
+
+#ifdef CONFIG_I2C4_RK30
+static struct i2c_board_info __initdata i2c4_info[] = {
+#ifdef CONFIG_MFD_RK610
+               {
+                       .type                   = "rk610_ctl",
+                       .addr                   = 0x40,
+                       .flags                  = 0,
+                       .platform_data          = &rk610_ctl_pdata,
+               },
+#ifdef CONFIG_RK610_TVOUT
+               {
+                       .type                   = "rk610_tvout",
+                       .addr                   = 0x42,
+                       .flags                  = 0,
+               },
+#endif
+#ifdef CONFIG_HDMI_RK610
+               {
+                       .type                   = "rk610_hdmi",
+                       .addr                   = 0x46,
+                       .flags                  = 0,
+                       .irq                    = INVALID_GPIO,
+               },
+#endif
+#ifdef CONFIG_SND_SOC_RK610
+               {//RK610_CODEC addr  from 0x60 to 0x80 (0x60~0x80)
+                       .type                   = "rk610_i2c_codec",
+                       .addr                   = 0x60,
+                       .flags                  = 0,
+                       .platform_data          = &rk610_codec_pdata,                   
+               },
+#endif
+#endif
+
+};
+#endif
+
+#ifdef CONFIG_I2C_GPIO_RK30
+#define I2C_SDA_PIN     INVALID_GPIO// RK30_PIN2_PD6   //set sda_pin here
+#define I2C_SCL_PIN     INVALID_GPIO//RK30_PIN2_PD7   //set scl_pin here
+static int rk30_i2c_io_init(void)
+{
+        //set iomux (gpio) here
+        //rk30_mux_api_set(GPIO2D7_I2C1SCL_NAME, GPIO2D_GPIO2D7);
+        //rk30_mux_api_set(GPIO2D6_I2C1SDA_NAME, GPIO2D_GPIO2D6);
+
+        return 0;
+}
+struct i2c_gpio_platform_data default_i2c_gpio_data = {
+       .sda_pin = I2C_SDA_PIN,
+       .scl_pin = I2C_SCL_PIN,
+       .udelay = 5, // clk = 500/udelay = 100Khz
+       .timeout = 100,//msecs_to_jiffies(100),
+       .bus_num    = 5,
+       .io_init = rk30_i2c_io_init,
+};
+static struct i2c_board_info __initdata i2c_gpio_info[] = {
+};
+#endif
+
+static void __init rk30_i2c_register_board_info(void)
+{
+#ifdef CONFIG_I2C0_RK30
+       i2c_register_board_info(0, i2c0_info, ARRAY_SIZE(i2c0_info));
+#endif
+#ifdef CONFIG_I2C1_RK30
+       i2c_register_board_info(1, i2c1_info, ARRAY_SIZE(i2c1_info));
+#endif
+#ifdef CONFIG_I2C2_RK30
+       i2c_register_board_info(2, i2c2_info, ARRAY_SIZE(i2c2_info));
+#endif
+#ifdef CONFIG_I2C3_RK30
+       i2c_register_board_info(3, i2c3_info, ARRAY_SIZE(i2c3_info));
+#endif
+#ifdef CONFIG_I2C4_RK30
+       i2c_register_board_info(4, i2c4_info, ARRAY_SIZE(i2c4_info));
+#endif
+#ifdef CONFIG_I2C_GPIO_RK30
+       i2c_register_board_info(5, i2c_gpio_info, ARRAY_SIZE(i2c_gpio_info));
+#endif
+}
+//end of i2c
+
+#define POWER_ON_PIN RK30_PIN0_PA0   //power_hold
+static void rk30_pm_power_off(void)
+{
+       printk(KERN_ERR "rk30_pm_power_off start...\n");
+       gpio_direction_output(POWER_ON_PIN, GPIO_LOW);
+#if defined(CONFIG_MFD_WM831X)
+       wm831x_set_bits(Wm831x,WM831X_GPIO_LEVEL,0x0001,0x0000);  //set sys_pwr 0
+       wm831x_device_shutdown(Wm831x);//wm8326 shutdown
+#endif
+#if defined(CONFIG_REGULATOR_ACT8846)
+       if (pmic_is_tps65910()) {
+               printk("enter dcdet===========\n");
+               if((gpio_get_value (RK30_PIN0_PB2) == GPIO_LOW)||(gpio_get_value (RK30_PIN0_PA7) == GPIO_HIGH))
+               {
+                       printk("enter restart===========\n");
+                       arm_pm_restart(0, NULL);
+               }
+               //act8931_device_shutdown();
+       }
+#endif
+       while (1);
+}
+
+static void __init machine_rk30_board_init(void)
+{
+       //avs_init();
+       gpio_request(POWER_ON_PIN, "poweronpin");
+       gpio_direction_output(POWER_ON_PIN, GPIO_HIGH);
+       
+       pm_power_off = rk30_pm_power_off;
+       
+        gpio_direction_output(POWER_ON_PIN, GPIO_HIGH);
+
+
+       rk30_i2c_register_board_info();
+       spi_register_board_info(board_spi_devices, ARRAY_SIZE(board_spi_devices));
+       platform_add_devices(devices, ARRAY_SIZE(devices));
+       rk_platform_add_display_devices();
+       board_usb_detect_init(RK30_PIN0_PA7);
+
+#ifdef CONFIG_WIFI_CONTROL_FUNC
+       rk29sdk_wifi_bt_gpio_control_init();
+#endif
+
+#if defined(CONFIG_MT6620)
+           clk_set_rate(clk_get_sys("rk_serial.1", "uart"), 48*1000000);
+#endif
+
+#if defined(CONFIG_MT5931_MT6622)
+               clk_set_rate(clk_get_sys("rk_serial.0", "uart"), 24*1000000);
+#endif         
+}
+
+static void __init rk30_reserve(void)
+{
+#ifdef CONFIG_ION
+       rk30_ion_pdata.heaps[0].base = board_mem_reserve_add("ion", ION_RESERVE_SIZE);
+#endif
+
+#ifdef CONFIG_FB_ROCKCHIP
+       resource_fb[0].start = board_mem_reserve_add("fb0 buf", get_fb_size());
+       resource_fb[0].end = resource_fb[0].start + get_fb_size()- 1;
+#if 0
+       resource_fb[1].start = board_mem_reserve_add("ipp buf", RK30_FB0_MEM_SIZE);
+       resource_fb[1].end = resource_fb[1].start + RK30_FB0_MEM_SIZE - 1;
+#endif
+
+#if defined(CONFIG_FB_ROTATE) || !defined(CONFIG_THREE_FB_BUFFER)
+       resource_fb[2].start = board_mem_reserve_add("fb2 buf",get_fb_size());
+       resource_fb[2].end = resource_fb[2].start + get_fb_size() - 1;
+#endif
+#endif
+
+
+#ifdef CONFIG_VIDEO_RK29
+       rk30_camera_request_reserve_mem();
+#endif
+       
+#ifdef CONFIG_GPS_RK
+       //it must be more than 8MB
+       rk_gps_info.u32MemoryPhyAddr = board_mem_reserve_add("gps", SZ_8M);
+#endif
+       board_mem_reserved();
+}
+
+/**
+ * dvfs_cpu_logic_table: table for arm and logic dvfs 
+ * @frequency  : arm frequency
+ * @cpu_volt   : arm voltage depend on frequency
+ * @logic_volt : logic voltage arm requests depend on frequency
+ * comments    : min arm/logic voltage
+ */
+static struct cpufreq_frequency_table dvfs_arm_table[] = {
+       {.frequency = 312 * 1000,       .index = 900 * 1000},
+       {.frequency = 504 * 1000,       .index = 950 * 1000},
+       {.frequency = 816 * 1000,       .index = 1000 * 1000},
+       {.frequency = 1008 * 1000,      .index = 1075 * 1000},
+       {.frequency = 1200 * 1000,      .index = 1150 * 1000},
+       //{.frequency = 1416 * 1000,      .index = 1250 * 1000},
+       //{.frequency = 1608 * 1000,      .index = 1300 * 1000},
+       {.frequency = CPUFREQ_TABLE_END},
+};
+
+static struct cpufreq_frequency_table dvfs_gpu_table[] = {
+       {.frequency = 100 * 1000,       .index = 1000 * 1000},
+       {.frequency = 200 * 1000,       .index = 1000 * 1000},
+       {.frequency = 266 * 1000,       .index = 1050 * 1000},
+       {.frequency = 300 * 1000,       .index = 1050 * 1000},
+       {.frequency = 400 * 1000,       .index = 1100 * 1000},
+       //{.frequency = 600 * 1000,     .index = 1200 * 1000},
+       {.frequency = CPUFREQ_TABLE_END},
+};
+
+static struct cpufreq_frequency_table dvfs_ddr_table[] = {
+       {.frequency = 200 * 1000 + DDR_FREQ_SUSPEND,    .index = 950 * 1000},
+       {.frequency = 300 * 1000 + DDR_FREQ_VIDEO,      .index = 1100 * 1000},
+       {.frequency = 400 * 1000 + DDR_FREQ_NORMAL,     .index = 1100 * 1000},
+       {.frequency = CPUFREQ_TABLE_END},
+};
+
+//#define DVFS_CPU_TABLE_SIZE  (ARRAY_SIZE(dvfs_cpu_logic_table))
+//static struct cpufreq_frequency_table cpu_dvfs_table[DVFS_CPU_TABLE_SIZE];
+//static struct cpufreq_frequency_table dep_cpu2core_table[DVFS_CPU_TABLE_SIZE];
+
+void __init board_clock_init(void)
+{
+       rk30_clock_data_init(periph_pll_default, codec_pll_default, RK30_CLOCKS_DEFAULT_FLAGS);
+       //dvfs_set_arm_logic_volt(dvfs_cpu_logic_table, cpu_dvfs_table, dep_cpu2core_table);
+       dvfs_set_freq_volt_table(clk_get(NULL, "cpu"), dvfs_arm_table);
+       dvfs_set_freq_volt_table(clk_get(NULL, "gpu"), dvfs_gpu_table);
+       dvfs_set_freq_volt_table(clk_get(NULL, "ddr"), dvfs_ddr_table);
+}
+
+MACHINE_START(RK30, "RK30board")
+       .boot_params    = PLAT_PHYS_OFFSET + 0x800,
+       .fixup          = rk30_fixup,
+       .reserve        = &rk30_reserve,
+       .map_io         = rk30_map_io,
+       .init_irq       = rk30_init_irq,
+       .timer          = &rk30_timer,
+       .init_machine   = machine_rk30_board_init,
+MACHINE_END