A22: default use 32K clock instead of 27M
author宋秀杰 <sxj@rock-chips.com>
Tue, 5 Jul 2011 04:18:12 +0000 (21:18 -0700)
committer宋秀杰 <sxj@rock-chips.com>
Tue, 5 Jul 2011 04:18:12 +0000 (21:18 -0700)
arch/arm/mach-rk29/board-rk29-a22.c
arch/arm/mach-rk29/spi_sram.c

index e058a65e6ea40bfb447c59af320af3fe24e29c0b..4951b1c68cfe78f03fcc3d4770ebaebd95525315 100755 (executable)
@@ -2592,8 +2592,8 @@ static void __init rk29_board_iomux_init(void)
                return -1;
        }
        //phy power down
-       gpio_direction_output(RK29_PIN4_PC0, GPIO_LOW);
-       gpio_set_value(RK29_PIN4_PC0, GPIO_LOW);
+       gpio_direction_output(RK29_PIN4_PC0, GPIO_HIGH);
+       gpio_set_value(RK29_PIN4_PC0, GPIO_HIGH);
 
        rk29_mux_api_set(GPIO4C5_RMIICSRDVALID_MIIRXDVALID_NAME,GPIO4H_GPIO4C5);
 
index c9512a8ba68fe52ed372a6718cdc02e7597dced8..c9a55429d084e74352f763df31269d9f0a31e607 100755 (executable)
@@ -548,7 +548,10 @@ void __sramfunc pm_clk_switch_32k(void)
 {
        int vol;
        sram_printch('7');
+
+       #ifndef CONFIG_MACH_RK29_A22
        pm_gpio_out_high(RK29_PIN4_PC0);
+       #endif
        sram_delay_loop(30);
 
        crumode=cru_readl(CRU_MODE_CON); //24M to 27M
@@ -565,8 +568,10 @@ void __sramfunc pm_clk_switch_32k(void)
        pm_gpio_out_low(RK29_PIN4_PC5);//enable 24M 
        sram_udelay(1000,24);
        cru_writel(crumode, CRU_MODE_CON); //externel clk 24M
-       
+
+       #ifndef CONFIG_MACH_RK29_A22
        pm_gpio_out_low(RK29_PIN4_PC0); //enable 27M
+       #endif
        sram_udelay(1000,27);
        sram_printch('7');
 
@@ -585,13 +590,13 @@ void __sramfunc pm_clk_switch(void)
 #ifdef  CONFIG_RK29_GPIO_SUSPEND
 void pm_gpio_suspend(void)
 {
-       pm_spi_gpio_suspend(); // spi  pullup/pulldown  disable.....¡£
+       pm_spi_gpio_suspend(); // spi  pullup/pulldown  disable.....
 
 }
 
 void pm_gpio_resume(void)
 {
-       pm_spi_gpio_resume(); // spi  pullup/pulldown  disable.....¡£
+       pm_spi_gpio_resume(); // spi  pullup/pulldown  disable.....
 
 }