clk: rockchip: rk3368: add 216M and 126M for armclkb and armclkl

support 216M/126M for armclkb and armclkl

Change-Id: I047ac24ad5a176923a55bd6934f06afcf272660d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk-rk3368.c b/drivers/clk/rockchip/clk-rk3368.c
index 65dbc9af1af904d01063984b871c064f71af9ff6..18f2fa00c3f8e80076286d3e48395c4720280ae0 100644 (file)
--- a/drivers/clk/rockchip/clk-rk3368.c
+++ b/drivers/clk/rockchip/clk-rk3368.c
@@ -236,6 +236,8 @@ static struct rockchip_cpuclk_rate_table rk3368_cpuclkb_rates[] __initdata = {
        RK3368_CPUCLKB_RATE( 600000000, 1, 1, 1),
        RK3368_CPUCLKB_RATE( 408000000, 1, 1, 1),
        RK3368_CPUCLKB_RATE( 312000000, 1, 1, 1),
+       RK3368_CPUCLKB_RATE( 216000000, 1, 1, 1),
+       RK3368_CPUCLKB_RATE( 126000000, 1, 1, 1),
 };
 
 static struct rockchip_cpuclk_rate_table rk3368_cpuclkl_rates[] __initdata = {
@@ -250,6 +252,8 @@ static struct rockchip_cpuclk_rate_table rk3368_cpuclkl_rates[] __initdata = {
        RK3368_CPUCLKL_RATE( 600000000, 1, 2, 2),
        RK3368_CPUCLKL_RATE( 408000000, 1, 1, 1),
        RK3368_CPUCLKL_RATE( 312000000, 1, 1, 1),
+       RK3368_CPUCLKL_RATE( 216000000, 1, 1, 1),
+       RK3368_CPUCLKL_RATE( 126000000, 1, 1, 1),
 };
 
 static struct rockchip_clk_branch rk3368_i2s_8ch_fracmux __initdata =