}
while (ShiftAmount--)
- Victim = DAG.getNode((Opc == ISD::SRA ? MSP430ISD::RRA : MSP430ISD::RLA),
+ Victim = DAG.getNode((Opc == ISD::SHL ? MSP430ISD::RLA : MSP430ISD::RRA),
dl, VT, Victim);
return Victim;
(implicit SRW)]>;
def SAR8r1c : Pseudo<(outs GR8:$dst), (ins GR8:$src),
- "clrc\n"
+ "clrc\n\t"
"rrc.b\t$dst",
[(set GR8:$dst, (MSP430rrc GR8:$src)),
(implicit SRW)]>;
def SAR16r1c : Pseudo<(outs GR16:$dst), (ins GR16:$src),
- "clrc\n"
+ "clrc\n\t"
"rrc.w\t$dst",
[(set GR16:$dst, (MSP430rrc GR16:$src)),
(implicit SRW)]>;
--- /dev/null
+; RUN: llvm-as < %s | llc -march=msp430 | grep rra | count 1
+
+define i16 @lsr2u16(i16 %x.arg) nounwind {
+ %retval = alloca i16
+ %x = alloca i16
+ store i16 %x.arg, i16* %x
+ %1 = load i16* %x
+ %2 = lshr i16 %1, 2
+ store i16 %2, i16* %retval
+ br label %return
+return:
+ %3 = load i16* %retval
+ ret i16 %3
+
+}
\ No newline at end of file