Set nomacro before emitting the sequence of instructions that set global pointer

register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144665 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Mips/MipsFrameLowering.cpp b/lib/Target/Mips/MipsFrameLowering.cpp
index 19bb1a55e68d5f215654d7d74b978002599bee84..4e977e90801315711819a94666242a49b8a047a9 100644 (file)
--- a/lib/Target/Mips/MipsFrameLowering.cpp
+++ b/lib/Target/Mips/MipsFrameLowering.cpp
@@ -169,13 +169,14 @@ void MipsFrameLowering::emitPrologue(MachineFunction &MF) const {
   MFI->setStackSize(StackSize); 
   
   BuildMI(MBB, MBBI, dl, TII.get(Mips::NOREORDER));
+  BuildMI(MBB, MBBI, dl, TII.get(Mips::NOMACRO));
 
   // Emit instructions that set $gp using the the value of $t9.
   // O32 uses the directive .cpload while N32/64 requires three instructions to
   // do this.  
   // TODO: Do not emit these instructions if no instructions use $gp.
   if (isPIC && STI.isABI_O32())
-    BuildMI(MBB, MBBI, dl, TII.get(Mips::CPLOAD))
+    BuildMI(MBB, llvm::prior(MBBI), dl, TII.get(Mips::CPLOAD))
       .addReg(RegInfo->getPICCallReg());
   else if (STI.isABI_N64() || (isPIC && STI.isABI_N32())) {
     //  lui     $28,%hi(%neg(%gp_rel(fname)))
@@ -189,8 +190,6 @@ void MipsFrameLowering::emitPrologue(MachineFunction &MF) const {
       .addGlobalAddress(FName, 0, MipsII::MO_GPOFF_LO);
   }
 
-  BuildMI(MBB, MBBI, dl, TII.get(Mips::NOMACRO));
-
   // No need to allocate space on the stack.
   if (StackSize == 0 && !MFI->adjustsStack()) return;