F: drivers/dma/sirf-dma.c
F: drivers/i2c/busses/i2c-sirf.c
F: drivers/mmc/host/sdhci-sirf.c
- F: drivers/pinctrl/pinctrl-sirf.c
+ F: drivers/pinctrl/sirf/
F: drivers/spi/spi-sirf.c
ARM/EBSA110 MACHINE SUPPORT
S: Maintained
F: drivers/net/wireless/atmel*
+ATTO EXPRESSSAS SAS/SATA RAID SCSI DRIVER
+M: Bradley Grove <linuxdrivers@attotech.com>
+L: linux-scsi@vger.kernel.org
+W: http://www.attotech.com
+S: Supported
+F: drivers/scsi/esas2r
+
AUDIT SUBSYSTEM
M: Al Viro <viro@zeniv.linux.org.uk>
M: Eric Paris <eparis@redhat.com>
S: Supported
F: drivers/scsi/bnx2fc/
+BROADCOM BNX2I 1/10 GIGABIT iSCSI DRIVER
+M: Eddie Wai <eddie.wai@broadcom.com>
+L: linux-scsi@vger.kernel.org
+S: Supported
+F: drivers/scsi/bnx2i/
+
BROADCOM SPECIFIC AMBA DRIVER (BCMA)
M: Rafał Miłecki <zajec5@gmail.com>
L: linux-wireless@vger.kernel.org
S: Maintained
F: include/linux/clk.h
+CLOCKSOURCE, CLOCKEVENT DRIVERS
+M: Daniel Lezcano <daniel.lezcano@linaro.org>
+M: Thomas Gleixner <tglx@linutronix.de>
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core
+S: Supported
+F: drivers/clocksource
+
CISCO FCOE HBA DRIVER
M: Hiral Patel <hiralpat@cisco.com>
M: Suma Ramars <sramars@cisco.com>
M: Pawel Moll <pawel.moll@arm.com>
M: Mark Rutland <mark.rutland@arm.com>
M: Stephen Warren <swarren@wwwdotorg.org>
-M: Ian Campbell <ian.campbell@citrix.com>
+M: Ian Campbell <ijc+devicetree@hellion.org.uk>
L: devicetree@vger.kernel.org
S: Maintained
F: Documentation/devicetree/
F: drivers/scsi/qla2xxx/
QLOGIC QLA4XXX iSCSI DRIVER
-M: Ravi Anand <ravi.anand@qlogic.com>
M: Vikas Chaudhary <vikas.chaudhary@qlogic.com>
M: iscsi-driver@qlogic.com
L: linux-scsi@vger.kernel.org
S: Supported
+F: Documentation/scsi/LICENSE.qla4xxx
F: drivers/scsi/qla4xxx/
QLOGIC QLA3XXX NETWORK DRIVER
F: include/linux/mmc/dw_mmc.h
F: drivers/mmc/host/dw_mmc*
-TIMEKEEPING, NTP
+TIMEKEEPING, CLOCKSOURCE CORE, NTP
M: John Stultz <john.stultz@linaro.org>
M: Thomas Gleixner <tglx@linutronix.de>
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core
F: kernel/time/clocksource.c
F: kernel/time/time*.c
F: kernel/time/ntp.c
-F: drivers/clocksource
TLG2300 VIDEO4LINUX-2 DRIVER
M: Huang Shijie <shijie8@gmail.com>
F: drivers/staging/nvec/
STAGING - OLPC SECONDARY DISPLAY CONTROLLER (DCON)
-M: Andres Salomon <dilinger@queued.net>
-M: Chris Ball <cjb@laptop.org>
+M: Jens Frederich <jfrederich@gmail.com>
+M: Daniel Drake <dsd@laptop.org>
M: Jon Nettleton <jon.nettleton@gmail.com>
W: http://wiki.laptop.org/go/DCON
-S: Odd Fixes
+S: Maintained
F: drivers/staging/olpc_dcon/
STAGING - OZMO DEVICES USB OVER WIFI DRIVER
T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git
S: Supported
F: Documentation/usb/
-F: drivers/net/usb/
F: drivers/usb/
F: include/linux/usb.h
F: include/linux/usb/
PALMAS_REG_SMPS7,
PALMAS_REG_SMPS8,
PALMAS_REG_SMPS9,
- PALMAS_REG_SMPS10,
+ PALMAS_REG_SMPS10_OUT2,
+ PALMAS_REG_SMPS10_OUT1,
/* LDO regulators */
PALMAS_REG_LDO1,
PALMAS_REG_LDO2,
int smps123;
int smps457;
- int range[PALMAS_REG_SMPS10];
- unsigned int ramp_delay[PALMAS_REG_SMPS10];
- unsigned int current_reg_mode[PALMAS_REG_SMPS10];
+ int range[PALMAS_REG_SMPS10_OUT1];
+ unsigned int ramp_delay[PALMAS_REG_SMPS10_OUT1];
+ unsigned int current_reg_mode[PALMAS_REG_SMPS10_OUT1];
};
struct palmas_resource {
struct extcon_dev edev;
- /* used to set vbus, in atomic path */
- struct work_struct set_vbus_work;
-
int id_otg_irq;
int id_irq;
int vbus_otg_irq;
int vbus_irq;
- int vbus_enable;
-
enum palmas_usb_state linkstat;
+ int wakeup;
+ bool enable_vbus_detection;
+ bool enable_id_detection;
};
#define comparator_to_palmas(x) container_of((x), struct palmas_usb, comparator)
#define PALMAS_DVFS_BASE 0x180
#define PALMAS_PMU_CONTROL_BASE 0x1A0
#define PALMAS_RESOURCE_BASE 0x1D4
- #define PALMAS_PU_PD_OD_BASE 0x1F4
+ #define PALMAS_PU_PD_OD_BASE 0x1F0
#define PALMAS_LED_BASE 0x200
#define PALMAS_INTERRUPT_BASE 0x210
#define PALMAS_USB_OTG_BASE 0x250
#define PALMAS_REGEN3_CTRL_MODE_ACTIVE_SHIFT 0
/* Registers for function PAD_CONTROL */
- #define PALMAS_PU_PD_INPUT_CTRL1 0x0
- #define PALMAS_PU_PD_INPUT_CTRL2 0x1
- #define PALMAS_PU_PD_INPUT_CTRL3 0x2
- #define PALMAS_OD_OUTPUT_CTRL 0x4
- #define PALMAS_POLARITY_CTRL 0x5
- #define PALMAS_PRIMARY_SECONDARY_PAD1 0x6
- #define PALMAS_PRIMARY_SECONDARY_PAD2 0x7
- #define PALMAS_I2C_SPI 0x8
- #define PALMAS_PU_PD_INPUT_CTRL4 0x9
- #define PALMAS_PRIMARY_SECONDARY_PAD3 0xA
+ #define PALMAS_OD_OUTPUT_CTRL2 0x2
+ #define PALMAS_POLARITY_CTRL2 0x3
+ #define PALMAS_PU_PD_INPUT_CTRL1 0x4
+ #define PALMAS_PU_PD_INPUT_CTRL2 0x5
+ #define PALMAS_PU_PD_INPUT_CTRL3 0x6
+ #define PALMAS_PU_PD_INPUT_CTRL5 0x7
+ #define PALMAS_OD_OUTPUT_CTRL 0x8
+ #define PALMAS_POLARITY_CTRL 0x9
+ #define PALMAS_PRIMARY_SECONDARY_PAD1 0xA
+ #define PALMAS_PRIMARY_SECONDARY_PAD2 0xB
+ #define PALMAS_I2C_SPI 0xC
+ #define PALMAS_PU_PD_INPUT_CTRL4 0xD
+ #define PALMAS_PRIMARY_SECONDARY_PAD3 0xE
+ #define PALMAS_PRIMARY_SECONDARY_PAD4 0xF
/* Bit definitions for PU_PD_INPUT_CTRL1 */
#define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD 0x40
#define PALMAS_PU_PD_GPIO_CTRL1 0x6
#define PALMAS_PU_PD_GPIO_CTRL2 0x7
#define PALMAS_OD_OUTPUT_GPIO_CTRL 0x8
+ #define PALMAS_GPIO_DATA_IN2 0x9
+ #define PALMAS_GPIO_DATA_DIR2 0x0A
+ #define PALMAS_GPIO_DATA_OUT2 0x0B
+ #define PALMAS_GPIO_DEBOUNCE_EN2 0x0C
+ #define PALMAS_GPIO_CLEAR_DATA_OUT2 0x0D
+ #define PALMAS_GPIO_SET_DATA_OUT2 0x0E
+ #define PALMAS_PU_PD_GPIO_CTRL3 0x0F
+ #define PALMAS_PU_PD_GPIO_CTRL4 0x10
+ #define PALMAS_OD_OUTPUT_GPIO_CTRL2 0x11
/* Bit definitions for GPIO_DATA_IN */
#define PALMAS_GPIO_DATA_IN_GPIO_7_IN 0x80