drm/nouveau/devinit: namespace + nvidia gpu names (no binary change)
authorBen Skeggs <bskeggs@redhat.com>
Wed, 14 Jan 2015 04:48:16 +0000 (14:48 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Thu, 22 Jan 2015 02:17:52 +0000 (12:17 +1000)
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
29 files changed:
drivers/gpu/drm/nouveau/include/nvkm/core/os.h
drivers/gpu/drm/nouveau/include/nvkm/subdev/devinit.h
drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c
drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c
drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/Kbuild
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/base.c
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/fbmem.h
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g84.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm204.c
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.h
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.c
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv10.c
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv1a.c
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv20.c
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.h
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv84.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv98.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nva3.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nvaf.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nvc0.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/priv.h

index 70ad99dd01e615f4f1a67254df6e30b8387662bc..2b0fe0e7da8c3cde6068ffc0f8cf92b893e84959 100644 (file)
 #define nva3_clk_post gt215_clk_post
 #define nva3_clk_info gt215_clk_info
 #define nva3_pll_info gt215_pll_info
+#define nouveau_ibus nvkm_ibus
 
 #endif
index b627d53295435dec08f04df3c11fb1998a82f199..d1bbe0d62b35bee05e54802a351a65495cf8d3c9 100644 (file)
@@ -1,35 +1,32 @@
-#ifndef __NOUVEAU_DEVINIT_H__
-#define __NOUVEAU_DEVINIT_H__
-
+#ifndef __NVKM_DEVINIT_H__
+#define __NVKM_DEVINIT_H__
 #include <core/subdev.h>
-#include <core/device.h>
 
-struct nouveau_devinit {
-       struct nouveau_subdev base;
+struct nvkm_devinit {
+       struct nvkm_subdev base;
        bool post;
-       void (*meminit)(struct nouveau_devinit *);
-       int  (*pll_set)(struct nouveau_devinit *, u32 type, u32 freq);
-       u32  (*mmio)(struct nouveau_devinit *, u32 addr);
+       void (*meminit)(struct nvkm_devinit *);
+       int  (*pll_set)(struct nvkm_devinit *, u32 type, u32 freq);
+       u32  (*mmio)(struct nvkm_devinit *, u32 addr);
 };
 
-static inline struct nouveau_devinit *
-nouveau_devinit(void *obj)
+static inline struct nvkm_devinit *
+nvkm_devinit(void *obj)
 {
-       return (void *)nouveau_subdev(obj, NVDEV_SUBDEV_DEVINIT);
+       return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_DEVINIT);
 }
 
-extern struct nouveau_oclass *nv04_devinit_oclass;
-extern struct nouveau_oclass *nv05_devinit_oclass;
-extern struct nouveau_oclass *nv10_devinit_oclass;
-extern struct nouveau_oclass *nv1a_devinit_oclass;
-extern struct nouveau_oclass *nv20_devinit_oclass;
-extern struct nouveau_oclass *nv50_devinit_oclass;
-extern struct nouveau_oclass *nv84_devinit_oclass;
-extern struct nouveau_oclass *nv98_devinit_oclass;
-extern struct nouveau_oclass *nva3_devinit_oclass;
-extern struct nouveau_oclass *nvaf_devinit_oclass;
-extern struct nouveau_oclass *nvc0_devinit_oclass;
-extern struct nouveau_oclass *gm107_devinit_oclass;
-extern struct nouveau_oclass *gm204_devinit_oclass;
-
+extern struct nvkm_oclass *nv04_devinit_oclass;
+extern struct nvkm_oclass *nv05_devinit_oclass;
+extern struct nvkm_oclass *nv10_devinit_oclass;
+extern struct nvkm_oclass *nv1a_devinit_oclass;
+extern struct nvkm_oclass *nv20_devinit_oclass;
+extern struct nvkm_oclass *nv50_devinit_oclass;
+extern struct nvkm_oclass *g84_devinit_oclass;
+extern struct nvkm_oclass *g98_devinit_oclass;
+extern struct nvkm_oclass *gt215_devinit_oclass;
+extern struct nvkm_oclass *mcp89_devinit_oclass;
+extern struct nvkm_oclass *gf100_devinit_oclass;
+extern struct nvkm_oclass *gm107_devinit_oclass;
+extern struct nvkm_oclass *gm204_devinit_oclass;
 #endif
index 9df93c5b7489825bb7d96f27ddbc379358073e20..ead3914804791cb3b0390663bdbfbf565d1677f5 100644 (file)
@@ -96,7 +96,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] =  g84_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv84_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  g84_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nv50_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nv50_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -125,7 +125,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] =  g84_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv84_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  g84_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nv50_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nv50_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -154,7 +154,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] =  g84_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv84_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  g84_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nv50_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nv50_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -183,7 +183,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] =  g84_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv84_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  g84_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nv94_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -212,7 +212,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] =  g84_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv84_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  g84_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nv94_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -241,7 +241,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] =  g84_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv98_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  g98_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -270,7 +270,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] =  g84_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv84_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  g84_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -299,7 +299,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] =  mcp77_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv98_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  g98_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -328,7 +328,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] =  mcp77_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nv84_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv98_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  g98_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -357,7 +357,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gt215_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nva3_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nva3_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gt215_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -388,7 +388,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gt215_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nva3_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nva3_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gt215_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -418,7 +418,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gt215_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nva3_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nva3_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gt215_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -448,7 +448,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gt215_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nva3_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvaf_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  mcp89_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
index 8d0304f5de734a530e3a2130497fe510463d9829..56843b0cdfb06ee78b9241965e90004f1c7399fd 100644 (file)
@@ -68,7 +68,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gf100_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nva3_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nvc0_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -101,7 +101,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gf100_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nva3_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nvc0_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -134,7 +134,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gf100_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nva3_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -166,7 +166,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gf100_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nva3_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nvc0_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -199,7 +199,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gf100_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nva3_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -231,7 +231,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gf100_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nva3_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -263,7 +263,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gf100_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nva3_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nvc0_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -296,7 +296,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gf100_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nvd0_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -328,7 +328,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gf100_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nvd0_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
index 9f0efb1d53492e8af88ff31738ff61939ea41dd9..2abd532e2b096f3c4aaff3895e0fa588ae879b79 100644 (file)
@@ -68,7 +68,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gk104_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nvd0_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -102,7 +102,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gk104_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nvd0_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -136,7 +136,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gk104_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nvd0_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -192,7 +192,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gk104_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nvd0_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -226,7 +226,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gk104_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nvd0_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -260,7 +260,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gk104_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nvd0_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
@@ -293,7 +293,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_CLK    ] = &gk104_clk_oclass;
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nvd0_therm_oclass;
                device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;
                device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
index 4321e285c51c3e348e7379a452e7ac63643452e6..793e73d16dac24be717eecbb66e5f76c66cfa4ae 100644 (file)
@@ -5,10 +5,10 @@ nvkm-y += nvkm/subdev/devinit/nv10.o
 nvkm-y += nvkm/subdev/devinit/nv1a.o
 nvkm-y += nvkm/subdev/devinit/nv20.o
 nvkm-y += nvkm/subdev/devinit/nv50.o
-nvkm-y += nvkm/subdev/devinit/nv84.o
-nvkm-y += nvkm/subdev/devinit/nv98.o
-nvkm-y += nvkm/subdev/devinit/nva3.o
-nvkm-y += nvkm/subdev/devinit/nvaf.o
-nvkm-y += nvkm/subdev/devinit/nvc0.o
+nvkm-y += nvkm/subdev/devinit/g84.o
+nvkm-y += nvkm/subdev/devinit/g98.o
+nvkm-y += nvkm/subdev/devinit/gt215.o
+nvkm-y += nvkm/subdev/devinit/mcp89.o
+nvkm-y += nvkm/subdev/devinit/gf100.o
 nvkm-y += nvkm/subdev/devinit/gm107.o
 nvkm-y += nvkm/subdev/devinit/gm204.o
index 0e45cee82463af6553be67389282cbf74290b009..b0d7c5f40db1f286278e5521e23fc22f4ac813b8 100644 (file)
  *
  * Authors: Ben Skeggs
  */
+#include "priv.h"
 
+#include <core/device.h>
 #include <core/option.h>
-
 #include <subdev/vga.h>
 
-#include "priv.h"
-
 int
-_nouveau_devinit_fini(struct nouveau_object *object, bool suspend)
+_nvkm_devinit_fini(struct nvkm_object *object, bool suspend)
 {
-       struct nouveau_devinit *devinit = (void *)object;
+       struct nvkm_devinit *devinit = (void *)object;
 
        /* force full reinit on resume */
        if (suspend)
@@ -40,17 +39,17 @@ _nouveau_devinit_fini(struct nouveau_object *object, bool suspend)
        /* unlock the extended vga crtc regs */
        nv_lockvgac(devinit, false);
 
-       return nouveau_subdev_fini(&devinit->base, suspend);
+       return nvkm_subdev_fini(&devinit->base, suspend);
 }
 
 int
-_nouveau_devinit_init(struct nouveau_object *object)
+_nvkm_devinit_init(struct nvkm_object *object)
 {
-       struct nouveau_devinit_impl *impl = (void *)object->oclass;
-       struct nouveau_devinit *devinit = (void *)object;
+       struct nvkm_devinit_impl *impl = (void *)object->oclass;
+       struct nvkm_devinit *devinit = (void *)object;
        int ret;
 
-       ret = nouveau_subdev_init(&devinit->base);
+       ret = nvkm_subdev_init(&devinit->base);
        if (ret)
                return ret;
 
@@ -64,34 +63,32 @@ _nouveau_devinit_init(struct nouveau_object *object)
 }
 
 void
-_nouveau_devinit_dtor(struct nouveau_object *object)
+_nvkm_devinit_dtor(struct nvkm_object *object)
 {
-       struct nouveau_devinit *devinit = (void *)object;
+       struct nvkm_devinit *devinit = (void *)object;
 
        /* lock crtc regs */
        nv_lockvgac(devinit, true);
 
-       nouveau_subdev_destroy(&devinit->base);
+       nvkm_subdev_destroy(&devinit->base);
 }
 
 int
-nouveau_devinit_create_(struct nouveau_object *parent,
-                       struct nouveau_object *engine,
-                       struct nouveau_oclass *oclass,
-                       int size, void **pobject)
+nvkm_devinit_create_(struct nvkm_object *parent, struct nvkm_object *engine,
+                    struct nvkm_oclass *oclass, int size, void **pobject)
 {
-       struct nouveau_devinit_impl *impl = (void *)oclass;
-       struct nouveau_device *device = nv_device(parent);
-       struct nouveau_devinit *devinit;
+       struct nvkm_devinit_impl *impl = (void *)oclass;
+       struct nvkm_device *device = nv_device(parent);
+       struct nvkm_devinit *devinit;
        int ret;
 
-       ret = nouveau_subdev_create_(parent, engine, oclass, 0, "DEVINIT",
-                                    "init", size, pobject);
+       ret = nvkm_subdev_create_(parent, engine, oclass, 0, "DEVINIT",
+                                 "init", size, pobject);
        devinit = *pobject;
        if (ret)
                return ret;
 
-       devinit->post = nouveau_boolopt(device->cfgopt, "NvForcePost", false);
+       devinit->post = nvkm_boolopt(device->cfgopt, "NvForcePost", false);
        devinit->meminit = impl->meminit;
        devinit->pll_set = impl->pll_set;
        devinit->mmio    = impl->mmio;
index 6103484fea724da49f8984529b12d5f7a6f8b371..36684c3f9e9c85bb34bc0af574d955f5a8df20e4 100644 (file)
@@ -23,9 +23,7 @@
  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
-
 #include <core/device.h>
-
 #include <subdev/fb/regsnv04.h>
 
 #define NV04_PFB_DEBUG_0                                       0x00100080
@@ -48,7 +46,7 @@
 #      define NV10_PFB_REFCTRL_VALID_1                         (1 << 31)
 
 static inline struct io_mapping *
-fbmem_init(struct nouveau_device *dev)
+fbmem_init(struct nvkm_device *dev)
 {
        return io_mapping_create_wc(nv_device_resource_start(dev, 1),
                                    nv_device_resource_len(dev, 1));
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g84.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g84.c
new file mode 100644 (file)
index 0000000..ca776ce
--- /dev/null
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2013 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "nv50.h"
+
+#include <subdev/bios.h>
+#include <subdev/bios/init.h>
+
+static u64
+g84_devinit_disable(struct nvkm_devinit *devinit)
+{
+       struct nv50_devinit_priv *priv = (void *)devinit;
+       u32 r001540 = nv_rd32(priv, 0x001540);
+       u32 r00154c = nv_rd32(priv, 0x00154c);
+       u64 disable = 0ULL;
+
+       if (!(r001540 & 0x40000000)) {
+               disable |= (1ULL << NVDEV_ENGINE_MPEG);
+               disable |= (1ULL << NVDEV_ENGINE_VP);
+               disable |= (1ULL << NVDEV_ENGINE_BSP);
+               disable |= (1ULL << NVDEV_ENGINE_CIPHER);
+       }
+
+       if (!(r00154c & 0x00000004))
+               disable |= (1ULL << NVDEV_ENGINE_DISP);
+       if (!(r00154c & 0x00000020))
+               disable |= (1ULL << NVDEV_ENGINE_BSP);
+       if (!(r00154c & 0x00000040))
+               disable |= (1ULL << NVDEV_ENGINE_CIPHER);
+
+       return disable;
+}
+
+struct nvkm_oclass *
+g84_devinit_oclass = &(struct nvkm_devinit_impl) {
+       .base.handle = NV_SUBDEV(DEVINIT, 0x84),
+       .base.ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = nv50_devinit_ctor,
+               .dtor = _nvkm_devinit_dtor,
+               .init = nv50_devinit_init,
+               .fini = _nvkm_devinit_fini,
+       },
+       .pll_set = nv50_devinit_pll_set,
+       .disable = g84_devinit_disable,
+       .post = nvbios_init,
+}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.c
new file mode 100644 (file)
index 0000000..d29bace
--- /dev/null
@@ -0,0 +1,65 @@
+/*
+ * Copyright 2013 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "nv50.h"
+
+#include <subdev/bios.h>
+#include <subdev/bios/init.h>
+
+static u64
+g98_devinit_disable(struct nvkm_devinit *devinit)
+{
+       struct nv50_devinit_priv *priv = (void *)devinit;
+       u32 r001540 = nv_rd32(priv, 0x001540);
+       u32 r00154c = nv_rd32(priv, 0x00154c);
+       u64 disable = 0ULL;
+
+       if (!(r001540 & 0x40000000)) {
+               disable |= (1ULL << NVDEV_ENGINE_MSPDEC);
+               disable |= (1ULL << NVDEV_ENGINE_MSVLD);
+               disable |= (1ULL << NVDEV_ENGINE_MSPPP);
+       }
+
+       if (!(r00154c & 0x00000004))
+               disable |= (1ULL << NVDEV_ENGINE_DISP);
+       if (!(r00154c & 0x00000020))
+               disable |= (1ULL << NVDEV_ENGINE_MSVLD);
+       if (!(r00154c & 0x00000040))
+               disable |= (1ULL << NVDEV_ENGINE_SEC);
+
+       return disable;
+}
+
+struct nvkm_oclass *
+g98_devinit_oclass = &(struct nvkm_devinit_impl) {
+       .base.handle = NV_SUBDEV(DEVINIT, 0x98),
+       .base.ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = nv50_devinit_ctor,
+               .dtor = _nvkm_devinit_dtor,
+               .init = nv50_devinit_init,
+               .fini = _nvkm_devinit_fini,
+       },
+       .pll_set = nv50_devinit_pll_set,
+       .disable = g98_devinit_disable,
+       .post = nvbios_init,
+}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c
new file mode 100644 (file)
index 0000000..e8778c6
--- /dev/null
@@ -0,0 +1,124 @@
+/*
+ * Copyright 2013 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "nv50.h"
+
+#include <subdev/bios.h>
+#include <subdev/bios/init.h>
+#include <subdev/bios/pll.h>
+#include <subdev/clk/pll.h>
+
+int
+gf100_devinit_pll_set(struct nvkm_devinit *devinit, u32 type, u32 freq)
+{
+       struct nv50_devinit_priv *priv = (void *)devinit;
+       struct nvkm_bios *bios = nvkm_bios(priv);
+       struct nvbios_pll info;
+       int N, fN, M, P;
+       int ret;
+
+       ret = nvbios_pll_parse(bios, type, &info);
+       if (ret)
+               return ret;
+
+       ret = gt215_pll_calc(nv_subdev(devinit), &info, freq, &N, &fN, &M, &P);
+       if (ret < 0)
+               return ret;
+
+       switch (info.type) {
+       case PLL_VPLL0:
+       case PLL_VPLL1:
+       case PLL_VPLL2:
+       case PLL_VPLL3:
+               nv_mask(priv, info.reg + 0x0c, 0x00000000, 0x00000100);
+               nv_wr32(priv, info.reg + 0x04, (P << 16) | (N << 8) | M);
+               nv_wr32(priv, info.reg + 0x10, fN << 16);
+               break;
+       default:
+               nv_warn(priv, "0x%08x/%dKhz unimplemented\n", type, freq);
+               ret = -EINVAL;
+               break;
+       }
+
+       return ret;
+}
+
+static u64
+gf100_devinit_disable(struct nvkm_devinit *devinit)
+{
+       struct nv50_devinit_priv *priv = (void *)devinit;
+       u32 r022500 = nv_rd32(priv, 0x022500);
+       u64 disable = 0ULL;
+
+       if (r022500 & 0x00000001)
+               disable |= (1ULL << NVDEV_ENGINE_DISP);
+
+       if (r022500 & 0x00000002) {
+               disable |= (1ULL << NVDEV_ENGINE_MSPDEC);
+               disable |= (1ULL << NVDEV_ENGINE_MSPPP);
+       }
+
+       if (r022500 & 0x00000004)
+               disable |= (1ULL << NVDEV_ENGINE_MSVLD);
+       if (r022500 & 0x00000008)
+               disable |= (1ULL << NVDEV_ENGINE_MSENC);
+       if (r022500 & 0x00000100)
+               disable |= (1ULL << NVDEV_ENGINE_CE0);
+       if (r022500 & 0x00000200)
+               disable |= (1ULL << NVDEV_ENGINE_CE1);
+
+       return disable;
+}
+
+static int
+gf100_devinit_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+                  struct nvkm_oclass *oclass, void *data, u32 size,
+                  struct nvkm_object **pobject)
+{
+       struct nv50_devinit_priv *priv;
+       int ret;
+
+       ret = nvkm_devinit_create(parent, engine, oclass, &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       if (nv_rd32(priv, 0x022500) & 0x00000001)
+               priv->base.post = true;
+
+       return 0;
+}
+
+struct nvkm_oclass *
+gf100_devinit_oclass = &(struct nvkm_devinit_impl) {
+       .base.handle = NV_SUBDEV(DEVINIT, 0xc0),
+       .base.ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = gf100_devinit_ctor,
+               .dtor = _nvkm_devinit_dtor,
+               .init = nv50_devinit_init,
+               .fini = _nvkm_devinit_fini,
+       },
+       .pll_set = gf100_devinit_pll_set,
+       .disable = gf100_devinit_disable,
+       .post = nvbios_init,
+}.base;
index 04c04efcc8c4fddea7033c29859f135d87a85220..b345a53e881dc6e0f84fa188dfb32d50c90a675e 100644 (file)
  *
  * Authors: Ben Skeggs
  */
-
 #include "nv50.h"
 
+#include <subdev/bios.h>
+#include <subdev/bios/init.h>
+
 u64
-gm107_devinit_disable(struct nouveau_devinit *devinit)
+gm107_devinit_disable(struct nvkm_devinit *devinit)
 {
        struct nv50_devinit_priv *priv = (void *)devinit;
        u32 r021c00 = nv_rd32(priv, 0x021c00);
@@ -42,16 +44,16 @@ gm107_devinit_disable(struct nouveau_devinit *devinit)
        return disable;
 }
 
-struct nouveau_oclass *
-gm107_devinit_oclass = &(struct nouveau_devinit_impl) {
+struct nvkm_oclass *
+gm107_devinit_oclass = &(struct nvkm_devinit_impl) {
        .base.handle = NV_SUBDEV(DEVINIT, 0x07),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
+       .base.ofuncs = &(struct nvkm_ofuncs) {
                .ctor = nv50_devinit_ctor,
-               .dtor = _nouveau_devinit_dtor,
+               .dtor = _nvkm_devinit_dtor,
                .init = nv50_devinit_init,
-               .fini = _nouveau_devinit_fini,
+               .fini = _nvkm_devinit_fini,
        },
-       .pll_set = nvc0_devinit_pll_set,
+       .pll_set = gf100_devinit_pll_set,
        .disable = gm107_devinit_disable,
        .post = nvbios_init,
 }.base;
index e44a86662a2a3b5e3872447adae1672569f68087..535172c5f1ad0fda328eff542db8024afac00c02 100644 (file)
  *
  * Authors: Ben Skeggs
  */
+#include "nv50.h"
 
 #include <subdev/bios.h>
 #include <subdev/bios/bit.h>
 #include <subdev/bios/pmu.h>
 
-#include "nv50.h"
-
 static void
 pmu_code(struct nv50_devinit_priv *priv, u32 pmu, u32 img, u32 len, bool sec)
 {
-       struct nouveau_bios *bios = nouveau_bios(priv);
+       struct nvkm_bios *bios = nvkm_bios(priv);
        int i;
 
        nv_wr32(priv, 0x10a180, 0x01000000 | (sec ? 0x10000000 : 0) | pmu);
@@ -50,7 +49,7 @@ pmu_code(struct nv50_devinit_priv *priv, u32 pmu, u32 img, u32 len, bool sec)
 static void
 pmu_data(struct nv50_devinit_priv *priv, u32 pmu, u32 img, u32 len)
 {
-       struct nouveau_bios *bios = nouveau_bios(priv);
+       struct nvkm_bios *bios = nvkm_bios(priv);
        int i;
 
        nv_wr32(priv, 0x10a1c0, 0x01000000 | pmu);
@@ -78,7 +77,7 @@ static int
 pmu_load(struct nv50_devinit_priv *priv, u8 type, bool post,
         u32 *init_addr_pmu, u32 *args_addr_pmu)
 {
-       struct nouveau_bios *bios = nouveau_bios(priv);
+       struct nvkm_bios *bios = nvkm_bios(priv);
        struct nvbios_pmuR pmu;
 
        if (!nvbios_pmuRm(bios, type, &pmu)) {
@@ -103,10 +102,10 @@ pmu_load(struct nv50_devinit_priv *priv, u8 type, bool post,
 }
 
 static int
-gm204_devinit_post(struct nouveau_subdev *subdev, bool post)
+gm204_devinit_post(struct nvkm_subdev *subdev, bool post)
 {
-       struct nv50_devinit_priv *priv = (void *)nouveau_devinit(subdev);
-       struct nouveau_bios *bios = nouveau_bios(priv);
+       struct nv50_devinit_priv *priv = (void *)nvkm_devinit(subdev);
+       struct nvkm_bios *bios = nvkm_bios(priv);
        struct bit_entry bit_I;
        u32 init, args;
        int ret;
@@ -158,16 +157,16 @@ gm204_devinit_post(struct nouveau_subdev *subdev, bool post)
        return pmu_load(priv, 0x01, post, NULL, NULL);
 }
 
-struct nouveau_oclass *
-gm204_devinit_oclass = &(struct nouveau_devinit_impl) {
+struct nvkm_oclass *
+gm204_devinit_oclass = &(struct nvkm_devinit_impl) {
        .base.handle = NV_SUBDEV(DEVINIT, 0x07),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
+       .base.ofuncs = &(struct nvkm_ofuncs) {
                .ctor = nv50_devinit_ctor,
-               .dtor = _nouveau_devinit_dtor,
+               .dtor = _nvkm_devinit_dtor,
                .init = nv50_devinit_init,
-               .fini = _nouveau_devinit_fini,
+               .fini = _nvkm_devinit_fini,
        },
-       .pll_set = nvc0_devinit_pll_set,
+       .pll_set = gf100_devinit_pll_set,
        .disable = gm107_devinit_disable,
        .post = gm204_devinit_post,
 }.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c
new file mode 100644 (file)
index 0000000..6a3e8d4
--- /dev/null
@@ -0,0 +1,150 @@
+/*
+ * Copyright 2013 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "nv50.h"
+
+#include <subdev/bios.h>
+#include <subdev/bios/init.h>
+#include <subdev/bios/pll.h>
+#include <subdev/clk/pll.h>
+
+int
+gt215_devinit_pll_set(struct nvkm_devinit *devinit, u32 type, u32 freq)
+{
+       struct nv50_devinit_priv *priv = (void *)devinit;
+       struct nvkm_bios *bios = nvkm_bios(priv);
+       struct nvbios_pll info;
+       int N, fN, M, P;
+       int ret;
+
+       ret = nvbios_pll_parse(bios, type, &info);
+       if (ret)
+               return ret;
+
+       ret = gt215_pll_calc(nv_subdev(devinit), &info, freq, &N, &fN, &M, &P);
+       if (ret < 0)
+               return ret;
+
+       switch (info.type) {
+       case PLL_VPLL0:
+       case PLL_VPLL1:
+               nv_wr32(priv, info.reg + 0, 0x50000610);
+               nv_mask(priv, info.reg + 4, 0x003fffff,
+                                           (P << 16) | (M << 8) | N);
+               nv_wr32(priv, info.reg + 8, fN);
+               break;
+       default:
+               nv_warn(priv, "0x%08x/%dKhz unimplemented\n", type, freq);
+               ret = -EINVAL;
+               break;
+       }
+
+       return ret;
+}
+
+static u64
+gt215_devinit_disable(struct nvkm_devinit *devinit)
+{
+       struct nv50_devinit_priv *priv = (void *)devinit;
+       u32 r001540 = nv_rd32(priv, 0x001540);
+       u32 r00154c = nv_rd32(priv, 0x00154c);
+       u64 disable = 0ULL;
+
+       if (!(r001540 & 0x40000000)) {
+               disable |= (1ULL << NVDEV_ENGINE_MSPDEC);
+               disable |= (1ULL << NVDEV_ENGINE_MSPPP);
+       }
+
+       if (!(r00154c & 0x00000004))
+               disable |= (1ULL << NVDEV_ENGINE_DISP);
+       if (!(r00154c & 0x00000020))
+               disable |= (1ULL << NVDEV_ENGINE_MSVLD);
+       if (!(r00154c & 0x00000200))
+               disable |= (1ULL << NVDEV_ENGINE_CE0);
+
+       return disable;
+}
+
+static u32
+gt215_devinit_mmio_part[] = {
+       0x100720, 0x1008bc, 4,
+       0x100a20, 0x100adc, 4,
+       0x100d80, 0x100ddc, 4,
+       0x110000, 0x110f9c, 4,
+       0x111000, 0x11103c, 8,
+       0x111080, 0x1110fc, 4,
+       0x111120, 0x1111fc, 4,
+       0x111300, 0x1114bc, 4,
+       0,
+};
+
+static u32
+gt215_devinit_mmio(struct nvkm_devinit *devinit, u32 addr)
+{
+       struct nv50_devinit_priv *priv = (void *)devinit;
+       u32 *mmio = gt215_devinit_mmio_part;
+
+       /* the init tables on some boards have INIT_RAM_RESTRICT_ZM_REG_GROUP
+        * instructions which touch registers that may not even exist on
+        * some configurations (Quadro 400), which causes the register
+        * interface to screw up for some amount of time after attempting to
+        * write to one of these, and results in all sorts of things going
+        * horribly wrong.
+        *
+        * the binary driver avoids touching these registers at all, however,
+        * the video bios doesn't care and does what the scripts say.  it's
+        * presumed that the io-port access to priv registers isn't effected
+        * by the screw-up bug mentioned above.
+        *
+        * really, a new opcode should've been invented to handle these
+        * requirements, but whatever, it's too late for that now.
+        */
+       while (mmio[0]) {
+               if (addr >= mmio[0] && addr <= mmio[1]) {
+                       u32 part = (addr / mmio[2]) & 7;
+                       if (!priv->r001540)
+                               priv->r001540 = nv_rd32(priv, 0x001540);
+                       if (part >= hweight8((priv->r001540 >> 16) & 0xff))
+                               return ~0;
+                       return addr;
+               }
+               mmio += 3;
+       }
+
+       return addr;
+}
+
+struct nvkm_oclass *
+gt215_devinit_oclass = &(struct nvkm_devinit_impl) {
+       .base.handle = NV_SUBDEV(DEVINIT, 0xa3),
+       .base.ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = nv50_devinit_ctor,
+               .dtor = _nvkm_devinit_dtor,
+               .init = nv50_devinit_init,
+               .fini = _nvkm_devinit_fini,
+       },
+       .pll_set = gt215_devinit_pll_set,
+       .disable = gt215_devinit_disable,
+       .mmio    = gt215_devinit_mmio,
+       .post = nvbios_init,
+}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.c
new file mode 100644 (file)
index 0000000..55cf48b
--- /dev/null
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2013 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "nv50.h"
+
+#include <subdev/bios.h>
+#include <subdev/bios/init.h>
+
+static u64
+mcp89_devinit_disable(struct nvkm_devinit *devinit)
+{
+       struct nv50_devinit_priv *priv = (void *)devinit;
+       u32 r001540 = nv_rd32(priv, 0x001540);
+       u32 r00154c = nv_rd32(priv, 0x00154c);
+       u64 disable = 0;
+
+       if (!(r001540 & 0x40000000)) {
+               disable |= (1ULL << NVDEV_ENGINE_MSPDEC);
+               disable |= (1ULL << NVDEV_ENGINE_MSPPP);
+       }
+
+       if (!(r00154c & 0x00000004))
+               disable |= (1ULL << NVDEV_ENGINE_DISP);
+       if (!(r00154c & 0x00000020))
+               disable |= (1ULL << NVDEV_ENGINE_MSVLD);
+       if (!(r00154c & 0x00000040))
+               disable |= (1ULL << NVDEV_ENGINE_VIC);
+       if (!(r00154c & 0x00000200))
+               disable |= (1ULL << NVDEV_ENGINE_CE0);
+
+       return disable;
+}
+
+struct nvkm_oclass *
+mcp89_devinit_oclass = &(struct nvkm_devinit_impl) {
+       .base.handle = NV_SUBDEV(DEVINIT, 0xaf),
+       .base.ofuncs = &(struct nvkm_ofuncs) {
+               .ctor = nv50_devinit_ctor,
+               .dtor = _nvkm_devinit_dtor,
+               .init = nv50_devinit_init,
+               .fini = _nvkm_devinit_fini,
+       },
+       .pll_set = gt215_devinit_pll_set,
+       .disable = mcp89_devinit_disable,
+       .post = nvbios_init,
+}.base;
index 65651c50f6ea3ddce07e754bcb2f681ff2af8256..03a0da8342440145b2de8b9f89116077f87aa5e0 100644 (file)
  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
+#include "nv04.h"
+#include "fbmem.h"
 
+#include <subdev/bios.h>
+#include <subdev/bios/init.h>
+#include <subdev/bios/pll.h>
+#include <subdev/clk/pll.h>
 #include <subdev/vga.h>
 
-#include "fbmem.h"
-#include "nv04.h"
-
 static void
-nv04_devinit_meminit(struct nouveau_devinit *devinit)
+nv04_devinit_meminit(struct nvkm_devinit *devinit)
 {
        struct nv04_devinit_priv *priv = (void *)devinit;
        u32 patt = 0xdeadbeef;
@@ -136,10 +139,10 @@ powerctrl_1_shift(int chip_version, int reg)
 }
 
 void
-setPLL_single(struct nouveau_devinit *devinit, u32 reg,
-             struct nouveau_pll_vals *pv)
+setPLL_single(struct nvkm_devinit *devinit, u32 reg,
+             struct nvkm_pll_vals *pv)
 {
-       int chip_version = nouveau_bios(devinit)->version.chip;
+       int chip_version = nvkm_bios(devinit)->version.chip;
        uint32_t oldpll = nv_rd32(devinit, reg);
        int oldN = (oldpll >> 8) & 0xff, oldM = oldpll & 0xff;
        uint32_t pll = (oldpll & 0xfff80000) | pv->log2P << 16 | pv->NM1;
@@ -190,10 +193,10 @@ new_ramdac580(uint32_t reg1, bool ss, uint32_t ramdac580)
 }
 
 void
-setPLL_double_highregs(struct nouveau_devinit *devinit, u32 reg1,
-                      struct nouveau_pll_vals *pv)
+setPLL_double_highregs(struct nvkm_devinit *devinit, u32 reg1,
+                      struct nvkm_pll_vals *pv)
 {
-       int chip_version = nouveau_bios(devinit)->version.chip;
+       int chip_version = nvkm_bios(devinit)->version.chip;
        bool nv3035 = chip_version == 0x30 || chip_version == 0x35;
        uint32_t reg2 = reg1 + ((reg1 == 0x680520) ? 0x5c : 0x70);
        uint32_t oldpll1 = nv_rd32(devinit, reg1);
@@ -267,8 +270,8 @@ setPLL_double_highregs(struct nouveau_devinit *devinit, u32 reg1,
 }
 
 void
-setPLL_double_lowregs(struct nouveau_devinit *devinit, u32 NMNMreg,
-                     struct nouveau_pll_vals *pv)
+setPLL_double_lowregs(struct nvkm_devinit *devinit, u32 NMNMreg,
+                     struct nvkm_pll_vals *pv)
 {
        /* When setting PLLs, there is a merry game of disabling and enabling
         * various bits of hardware during the process. This function is a
@@ -301,7 +304,7 @@ setPLL_double_lowregs(struct nouveau_devinit *devinit, u32 NMNMreg,
                struct nvbios_pll info;
                uint8_t Pval2;
 
-               if (nvbios_pll_parse(nouveau_bios(devinit), Preg, &info))
+               if (nvbios_pll_parse(nvkm_bios(devinit), Preg, &info))
                        return;
 
                Pval2 = pv->log2P + info.bias_p;
@@ -347,10 +350,10 @@ setPLL_double_lowregs(struct nouveau_devinit *devinit, u32 NMNMreg,
 }
 
 int
-nv04_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq)
+nv04_devinit_pll_set(struct nvkm_devinit *devinit, u32 type, u32 freq)
 {
-       struct nouveau_bios *bios = nouveau_bios(devinit);
-       struct nouveau_pll_vals pv;
+       struct nvkm_bios *bios = nvkm_bios(devinit);
+       struct nvkm_pll_vals pv;
        struct nvbios_pll info;
        int cv = bios->version.chip;
        int N1, M1, N2, M2, P;
@@ -361,7 +364,7 @@ nv04_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq)
                return ret;
 
        ret = nv04_pll_calc(nv_subdev(devinit), &info, freq,
-                          &N1, &M1, &N2, &M2, &P);
+                           &N1, &M1, &N2, &M2, &P);
        if (!ret)
                return -EINVAL;
 
@@ -385,7 +388,7 @@ nv04_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq)
 }
 
 int
-nv04_devinit_fini(struct nouveau_object *object, bool suspend)
+nv04_devinit_fini(struct nvkm_object *object, bool suspend)
 {
        struct nv04_devinit_priv *priv = (void *)object;
        int ret;
@@ -393,7 +396,7 @@ nv04_devinit_fini(struct nouveau_object *object, bool suspend)
        /* make i2c busses accessible */
        nv_mask(priv, 0x000200, 0x00000001, 0x00000001);
 
-       ret = nouveau_devinit_fini(&priv->base, suspend);
+       ret = nvkm_devinit_fini(&priv->base, suspend);
        if (ret)
                return ret;
 
@@ -401,12 +404,11 @@ nv04_devinit_fini(struct nouveau_object *object, bool suspend)
        if (priv->owner < 0)
                priv->owner = nv_rdvgaowner(priv);
        nv_wrvgaowner(priv, 0);
-
        return 0;
 }
 
 int
-nv04_devinit_init(struct nouveau_object *object)
+nv04_devinit_init(struct nvkm_object *object)
 {
        struct nv04_devinit_priv *priv = (void *)object;
 
@@ -422,29 +424,29 @@ nv04_devinit_init(struct nouveau_object *object)
                }
        }
 
-       return nouveau_devinit_init(&priv->base);
+       return nvkm_devinit_init(&priv->base);
 }
 
 void
-nv04_devinit_dtor(struct nouveau_object *object)
+nv04_devinit_dtor(struct nvkm_object *object)
 {
        struct nv04_devinit_priv *priv = (void *)object;
 
        /* restore vga owner saved at first init */
        nv_wrvgaowner(priv, priv->owner);
 
-       nouveau_devinit_destroy(&priv->base);
+       nvkm_devinit_destroy(&priv->base);
 }
 
 int
-nv04_devinit_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-                 struct nouveau_oclass *oclass, void *data, u32 size,
-                 struct nouveau_object **pobject)
+nv04_devinit_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+                 struct nvkm_oclass *oclass, void *data, u32 size,
+                 struct nvkm_object **pobject)
 {
        struct nv04_devinit_priv *priv;
        int ret;
 
-       ret = nouveau_devinit_create(parent, engine, oclass, &priv);
+       ret = nvkm_devinit_create(parent, engine, oclass, &priv);
        *pobject = nv_object(priv);
        if (ret)
                return ret;
@@ -453,10 +455,10 @@ nv04_devinit_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        return 0;
 }
 
-struct nouveau_oclass *
-nv04_devinit_oclass = &(struct nouveau_devinit_impl) {
+struct nvkm_oclass *
+nv04_devinit_oclass = &(struct nvkm_devinit_impl) {
        .base.handle = NV_SUBDEV(DEVINIT, 0x04),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
+       .base.ofuncs = &(struct nvkm_ofuncs) {
                .ctor = nv04_devinit_ctor,
                .dtor = nv04_devinit_dtor,
                .init = nv04_devinit_init,
index 23470a57510c3ce07f8b47e6754669f0037eca24..14a51a9ff7d0b590e1682bef9d01df77a93d835c 100644 (file)
@@ -1,23 +1,22 @@
 #ifndef __NVKM_DEVINIT_NV04_H__
 #define __NVKM_DEVINIT_NV04_H__
-
 #include "priv.h"
+struct nvkm_pll_vals;
 
 struct nv04_devinit_priv {
-       struct nouveau_devinit base;
+       struct nvkm_devinit base;
        u8 owner;
 };
 
-int  nv04_devinit_ctor(struct nouveau_object *, struct nouveau_object *,
-                      struct nouveau_oclass *, void *, u32,
-                      struct nouveau_object **);
-void nv04_devinit_dtor(struct nouveau_object *);
-int  nv04_devinit_init(struct nouveau_object *);
-int  nv04_devinit_fini(struct nouveau_object *, bool);
-int  nv04_devinit_pll_set(struct nouveau_devinit *, u32, u32);
-
-void setPLL_single(struct nouveau_devinit *, u32, struct nouveau_pll_vals *);
-void setPLL_double_highregs(struct nouveau_devinit *, u32, struct nouveau_pll_vals *);
-void setPLL_double_lowregs(struct nouveau_devinit *, u32, struct nouveau_pll_vals *);
+int  nv04_devinit_ctor(struct nvkm_object *, struct nvkm_object *,
+                      struct nvkm_oclass *, void *, u32,
+                      struct nvkm_object **);
+void nv04_devinit_dtor(struct nvkm_object *);
+int  nv04_devinit_init(struct nvkm_object *);
+int  nv04_devinit_fini(struct nvkm_object *, bool);
+int  nv04_devinit_pll_set(struct nvkm_devinit *, u32, u32);
 
+void setPLL_single(struct nvkm_devinit *, u32, struct nvkm_pll_vals *);
+void setPLL_double_highregs(struct nvkm_devinit *, u32, struct nvkm_pll_vals *);
+void setPLL_double_lowregs(struct nvkm_devinit *, u32, struct nvkm_pll_vals *);
 #endif
index a2007a3efc4d48d803ca1150fa44741a8b7085cd..def8649216c20a17e5e6e21a3064a1f2b3c7cb58 100644 (file)
  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
+#include "nv04.h"
+#include "fbmem.h"
 
 #include <subdev/bios.h>
 #include <subdev/bios/bmp.h>
+#include <subdev/bios/init.h>
 #include <subdev/vga.h>
 
-#include "fbmem.h"
-#include "nv04.h"
-
 static void
-nv05_devinit_meminit(struct nouveau_devinit *devinit)
+nv05_devinit_meminit(struct nvkm_devinit *devinit)
 {
        static const u8 default_config_tab[][2] = {
                { 0x24, 0x00 },
@@ -45,7 +45,7 @@ nv05_devinit_meminit(struct nouveau_devinit *devinit)
                { 0x00, 0x00 }
        };
        struct nv04_devinit_priv *priv = (void *)devinit;
-       struct nouveau_bios *bios = nouveau_bios(priv);
+       struct nvkm_bios *bios = nvkm_bios(priv);
        struct io_mapping *fb;
        u32 patt = 0xdeadbeef;
        u16 data;
@@ -125,10 +125,10 @@ out:
        fbmem_fini(fb);
 }
 
-struct nouveau_oclass *
-nv05_devinit_oclass = &(struct nouveau_devinit_impl) {
+struct nvkm_oclass *
+nv05_devinit_oclass = &(struct nvkm_devinit_impl) {
        .base.handle = NV_SUBDEV(DEVINIT, 0x05),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
+       .base.ofuncs = &(struct nvkm_ofuncs) {
                .ctor = nv04_devinit_ctor,
                .dtor = nv04_devinit_dtor,
                .init = nv04_devinit_init,
index 178b46f79b502920287a5710d311a9f83d722f92..7aabc1bf064036a8902155eb43880d7c6d24f0fd 100644 (file)
  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
-
-#include <subdev/vga.h>
-
-#include "fbmem.h"
 #include "nv04.h"
+#include "fbmem.h"
+
+#include <subdev/bios.h>
+#include <subdev/bios/init.h>
 
 static void
-nv10_devinit_meminit(struct nouveau_devinit *devinit)
+nv10_devinit_meminit(struct nvkm_devinit *devinit)
 {
        struct nv04_devinit_priv *priv = (void *)devinit;
        static const int mem_width[] = { 0x10, 0x00, 0x20 };
@@ -96,10 +96,10 @@ amount_found:
        fbmem_fini(fb);
 }
 
-struct nouveau_oclass *
-nv10_devinit_oclass = &(struct nouveau_devinit_impl) {
+struct nvkm_oclass *
+nv10_devinit_oclass = &(struct nvkm_devinit_impl) {
        .base.handle = NV_SUBDEV(DEVINIT, 0x10),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
+       .base.ofuncs = &(struct nvkm_ofuncs) {
                .ctor = nv04_devinit_ctor,
                .dtor = nv04_devinit_dtor,
                .init = nv04_devinit_init,
index 995dd97af3e923a074dc541603c0d39a03b825f3..9f36fff5a1c367a21291e7bc4018074408b33521 100644 (file)
  *
  * Authors: Ben Skeggs
  */
-
 #include "nv04.h"
 
-struct nouveau_oclass *
-nv1a_devinit_oclass = &(struct nouveau_devinit_impl) {
+#include <subdev/bios.h>
+#include <subdev/bios/init.h>
+
+struct nvkm_oclass *
+nv1a_devinit_oclass = &(struct nvkm_devinit_impl) {
        .base.handle = NV_SUBDEV(DEVINIT, 0x1a),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
+       .base.ofuncs = &(struct nvkm_ofuncs) {
                .ctor = nv04_devinit_ctor,
                .dtor = nv04_devinit_dtor,
                .init = nv04_devinit_init,
index 915089fb46f7965bae615d81b1f3176c306128a0..02fcfd921c42f1e07788e6b8cb312029fc212c8d 100644 (file)
  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
-
 #include "nv04.h"
 #include "fbmem.h"
 
+#include <subdev/bios.h>
+#include <subdev/bios/init.h>
+
 static void
-nv20_devinit_meminit(struct nouveau_devinit *devinit)
+nv20_devinit_meminit(struct nvkm_devinit *devinit)
 {
        struct nv04_devinit_priv *priv = (void *)devinit;
-       struct nouveau_device *device = nv_device(priv);
+       struct nvkm_device *device = nv_device(priv);
        uint32_t mask = (device->chipset >= 0x25 ? 0x300 : 0x900);
        uint32_t amount, off;
        struct io_mapping *fb;
@@ -60,10 +62,10 @@ nv20_devinit_meminit(struct nouveau_devinit *devinit)
        fbmem_fini(fb);
 }
 
-struct nouveau_oclass *
-nv20_devinit_oclass = &(struct nouveau_devinit_impl) {
+struct nvkm_oclass *
+nv20_devinit_oclass = &(struct nvkm_devinit_impl) {
        .base.handle = NV_SUBDEV(DEVINIT, 0x20),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
+       .base.ofuncs = &(struct nvkm_ofuncs) {
                .ctor = nv04_devinit_ctor,
                .dtor = nv04_devinit_dtor,
                .init = nv04_devinit_init,
index 968334d1dca4a5ac9cbfd9b486488d0467d82256..26b7cb13e167393ef66ac951b1cf252e98a91048 100644 (file)
  *
  * Authors: Ben Skeggs
  */
+#include "nv50.h"
 
 #include <subdev/bios.h>
 #include <subdev/bios/dcb.h>
 #include <subdev/bios/disp.h>
 #include <subdev/bios/init.h>
+#include <subdev/bios/pll.h>
+#include <subdev/clk/pll.h>
 #include <subdev/ibus.h>
 #include <subdev/vga.h>
 
-#include "nv50.h"
-
 int
-nv50_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq)
+nv50_devinit_pll_set(struct nvkm_devinit *devinit, u32 type, u32 freq)
 {
        struct nv50_devinit_priv *priv = (void *)devinit;
-       struct nouveau_bios *bios = nouveau_bios(priv);
+       struct nvkm_bios *bios = nvkm_bios(priv);
        struct nvbios_pll info;
        int N1, M1, N2, M2, P;
        int ret;
@@ -76,7 +77,7 @@ nv50_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq)
 }
 
 static u64
-nv50_devinit_disable(struct nouveau_devinit *devinit)
+nv50_devinit_disable(struct nvkm_devinit *devinit)
 {
        struct nv50_devinit_priv *priv = (void *)devinit;
        u32 r001540 = nv_rd32(priv, 0x001540);
@@ -89,10 +90,10 @@ nv50_devinit_disable(struct nouveau_devinit *devinit)
 }
 
 int
-nv50_devinit_init(struct nouveau_object *object)
+nv50_devinit_init(struct nvkm_object *object)
 {
-       struct nouveau_bios *bios = nouveau_bios(object);
-       struct nouveau_ibus *ibus = nouveau_ibus(object);
+       struct nvkm_bios *bios = nvkm_bios(object);
+       struct nvkm_ibus *ibus = nvkm_ibus(object);
        struct nv50_devinit_priv *priv = (void *)object;
        struct nvbios_outp info;
        struct dcb_output outp;
@@ -114,7 +115,7 @@ nv50_devinit_init(struct nouveau_object *object)
        if (priv->base.post && ibus)
                nv_ofuncs(ibus)->init(nv_object(ibus));
 
-       ret = nouveau_devinit_init(&priv->base);
+       ret = nvkm_devinit_init(&priv->base);
        if (ret)
                return ret;
 
@@ -124,7 +125,7 @@ nv50_devinit_init(struct nouveau_object *object)
         */
        while (priv->base.post && dcb_outp_parse(bios, i, &ver, &hdr, &outp)) {
                if (nvbios_outp_match(bios, outp.hasht, outp.hashm,
-                                    &ver, &hdr, &cnt, &len, &info)) {
+                                     &ver, &hdr, &cnt, &len, &info)) {
                        struct nvbios_init init = {
                                .subdev = nv_subdev(priv),
                                .bios = bios,
@@ -143,14 +144,14 @@ nv50_devinit_init(struct nouveau_object *object)
 }
 
 int
-nv50_devinit_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-                 struct nouveau_oclass *oclass, void *data, u32 size,
-                 struct nouveau_object **pobject)
+nv50_devinit_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+                 struct nvkm_oclass *oclass, void *data, u32 size,
+                 struct nvkm_object **pobject)
 {
        struct nv50_devinit_priv *priv;
        int ret;
 
-       ret = nouveau_devinit_create(parent, engine, oclass, &priv);
+       ret = nvkm_devinit_create(parent, engine, oclass, &priv);
        *pobject = nv_object(priv);
        if (ret)
                return ret;
@@ -158,14 +159,14 @@ nv50_devinit_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        return 0;
 }
 
-struct nouveau_oclass *
-nv50_devinit_oclass = &(struct nouveau_devinit_impl) {
+struct nvkm_oclass *
+nv50_devinit_oclass = &(struct nvkm_devinit_impl) {
        .base.handle = NV_SUBDEV(DEVINIT, 0x50),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
+       .base.ofuncs = &(struct nvkm_ofuncs) {
                .ctor = nv50_devinit_ctor,
-               .dtor = _nouveau_devinit_dtor,
+               .dtor = _nvkm_devinit_dtor,
                .init = nv50_devinit_init,
-               .fini = _nouveau_devinit_fini,
+               .fini = _nvkm_devinit_fini,
        },
        .pll_set = nv50_devinit_pll_set,
        .disable = nv50_devinit_disable,
index f412bb7f780e06020a95100fe2b4bdd07306fdbf..b882b65ff3cd2031ae6e9ccf18b1987b972846d3 100644 (file)
@@ -1,23 +1,21 @@
 #ifndef __NVKM_DEVINIT_NV50_H__
 #define __NVKM_DEVINIT_NV50_H__
-
 #include "priv.h"
 
 struct nv50_devinit_priv {
-       struct nouveau_devinit base;
+       struct nvkm_devinit base;
        u32 r001540;
 };
 
-int  nv50_devinit_ctor(struct nouveau_object *, struct nouveau_object *,
-                      struct nouveau_oclass *, void *, u32,
-                      struct nouveau_object **);
-int  nv50_devinit_init(struct nouveau_object *);
-int  nv50_devinit_pll_set(struct nouveau_devinit *, u32, u32);
-
-int  nva3_devinit_pll_set(struct nouveau_devinit *, u32, u32);
+int  nv50_devinit_ctor(struct nvkm_object *, struct nvkm_object *,
+                      struct nvkm_oclass *, void *, u32,
+                      struct nvkm_object **);
+int  nv50_devinit_init(struct nvkm_object *);
+int  nv50_devinit_pll_set(struct nvkm_devinit *, u32, u32);
 
-int  nvc0_devinit_pll_set(struct nouveau_devinit *, u32, u32);
+int  gt215_devinit_pll_set(struct nvkm_devinit *, u32, u32);
 
-u64  gm107_devinit_disable(struct nouveau_devinit *);
+int  gf100_devinit_pll_set(struct nvkm_devinit *, u32, u32);
 
+u64  gm107_devinit_disable(struct nvkm_devinit *);
 #endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv84.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv84.c
deleted file mode 100644 (file)
index c4f4c15..0000000
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * Copyright 2013 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include "nv50.h"
-
-static u64
-nv84_devinit_disable(struct nouveau_devinit *devinit)
-{
-       struct nv50_devinit_priv *priv = (void *)devinit;
-       u32 r001540 = nv_rd32(priv, 0x001540);
-       u32 r00154c = nv_rd32(priv, 0x00154c);
-       u64 disable = 0ULL;
-
-       if (!(r001540 & 0x40000000)) {
-               disable |= (1ULL << NVDEV_ENGINE_MPEG);
-               disable |= (1ULL << NVDEV_ENGINE_VP);
-               disable |= (1ULL << NVDEV_ENGINE_BSP);
-               disable |= (1ULL << NVDEV_ENGINE_CIPHER);
-       }
-
-       if (!(r00154c & 0x00000004))
-               disable |= (1ULL << NVDEV_ENGINE_DISP);
-       if (!(r00154c & 0x00000020))
-               disable |= (1ULL << NVDEV_ENGINE_BSP);
-       if (!(r00154c & 0x00000040))
-               disable |= (1ULL << NVDEV_ENGINE_CIPHER);
-
-       return disable;
-}
-
-struct nouveau_oclass *
-nv84_devinit_oclass = &(struct nouveau_devinit_impl) {
-       .base.handle = NV_SUBDEV(DEVINIT, 0x84),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nv50_devinit_ctor,
-               .dtor = _nouveau_devinit_dtor,
-               .init = nv50_devinit_init,
-               .fini = _nouveau_devinit_fini,
-       },
-       .pll_set = nv50_devinit_pll_set,
-       .disable = nv84_devinit_disable,
-       .post = nvbios_init,
-}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv98.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv98.c
deleted file mode 100644 (file)
index 3a629e0..0000000
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Copyright 2013 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include "nv50.h"
-
-static u64
-nv98_devinit_disable(struct nouveau_devinit *devinit)
-{
-       struct nv50_devinit_priv *priv = (void *)devinit;
-       u32 r001540 = nv_rd32(priv, 0x001540);
-       u32 r00154c = nv_rd32(priv, 0x00154c);
-       u64 disable = 0ULL;
-
-       if (!(r001540 & 0x40000000)) {
-               disable |= (1ULL << NVDEV_ENGINE_MSPDEC);
-               disable |= (1ULL << NVDEV_ENGINE_MSVLD);
-               disable |= (1ULL << NVDEV_ENGINE_MSPPP);
-       }
-
-       if (!(r00154c & 0x00000004))
-               disable |= (1ULL << NVDEV_ENGINE_DISP);
-       if (!(r00154c & 0x00000020))
-               disable |= (1ULL << NVDEV_ENGINE_MSVLD);
-       if (!(r00154c & 0x00000040))
-               disable |= (1ULL << NVDEV_ENGINE_SEC);
-
-       return disable;
-}
-
-struct nouveau_oclass *
-nv98_devinit_oclass = &(struct nouveau_devinit_impl) {
-       .base.handle = NV_SUBDEV(DEVINIT, 0x98),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nv50_devinit_ctor,
-               .dtor = _nouveau_devinit_dtor,
-               .init = nv50_devinit_init,
-               .fini = _nouveau_devinit_fini,
-       },
-       .pll_set = nv50_devinit_pll_set,
-       .disable = nv98_devinit_disable,
-       .post = nvbios_init,
-}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nva3.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nva3.c
deleted file mode 100644 (file)
index 830fdff..0000000
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * Copyright 2013 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include "nv50.h"
-
-int
-nva3_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq)
-{
-       struct nv50_devinit_priv *priv = (void *)devinit;
-       struct nouveau_bios *bios = nouveau_bios(priv);
-       struct nvbios_pll info;
-       int N, fN, M, P;
-       int ret;
-
-       ret = nvbios_pll_parse(bios, type, &info);
-       if (ret)
-               return ret;
-
-       ret = nva3_pll_calc(nv_subdev(devinit), &info, freq, &N, &fN, &M, &P);
-       if (ret < 0)
-               return ret;
-
-       switch (info.type) {
-       case PLL_VPLL0:
-       case PLL_VPLL1:
-               nv_wr32(priv, info.reg + 0, 0x50000610);
-               nv_mask(priv, info.reg + 4, 0x003fffff,
-                                           (P << 16) | (M << 8) | N);
-               nv_wr32(priv, info.reg + 8, fN);
-               break;
-       default:
-               nv_warn(priv, "0x%08x/%dKhz unimplemented\n", type, freq);
-               ret = -EINVAL;
-               break;
-       }
-
-       return ret;
-}
-
-static u64
-nva3_devinit_disable(struct nouveau_devinit *devinit)
-{
-       struct nv50_devinit_priv *priv = (void *)devinit;
-       u32 r001540 = nv_rd32(priv, 0x001540);
-       u32 r00154c = nv_rd32(priv, 0x00154c);
-       u64 disable = 0ULL;
-
-       if (!(r001540 & 0x40000000)) {
-               disable |= (1ULL << NVDEV_ENGINE_MSPDEC);
-               disable |= (1ULL << NVDEV_ENGINE_MSPPP);
-       }
-
-       if (!(r00154c & 0x00000004))
-               disable |= (1ULL << NVDEV_ENGINE_DISP);
-       if (!(r00154c & 0x00000020))
-               disable |= (1ULL << NVDEV_ENGINE_MSVLD);
-       if (!(r00154c & 0x00000200))
-               disable |= (1ULL << NVDEV_ENGINE_CE0);
-
-       return disable;
-}
-
-static u32
-nva3_devinit_mmio_part[] = {
-       0x100720, 0x1008bc, 4,
-       0x100a20, 0x100adc, 4,
-       0x100d80, 0x100ddc, 4,
-       0x110000, 0x110f9c, 4,
-       0x111000, 0x11103c, 8,
-       0x111080, 0x1110fc, 4,
-       0x111120, 0x1111fc, 4,
-       0x111300, 0x1114bc, 4,
-       0,
-};
-
-static u32
-nva3_devinit_mmio(struct nouveau_devinit *devinit, u32 addr)
-{
-       struct nv50_devinit_priv *priv = (void *)devinit;
-       u32 *mmio = nva3_devinit_mmio_part;
-
-       /* the init tables on some boards have INIT_RAM_RESTRICT_ZM_REG_GROUP
-        * instructions which touch registers that may not even exist on
-        * some configurations (Quadro 400), which causes the register
-        * interface to screw up for some amount of time after attempting to
-        * write to one of these, and results in all sorts of things going
-        * horribly wrong.
-        *
-        * the binary driver avoids touching these registers at all, however,
-        * the video bios doesn't care and does what the scripts say.  it's
-        * presumed that the io-port access to priv registers isn't effected
-        * by the screw-up bug mentioned above.
-        *
-        * really, a new opcode should've been invented to handle these
-        * requirements, but whatever, it's too late for that now.
-        */
-       while (mmio[0]) {
-               if (addr >= mmio[0] && addr <= mmio[1]) {
-                       u32 part = (addr / mmio[2]) & 7;
-                       if (!priv->r001540)
-                               priv->r001540 = nv_rd32(priv, 0x001540);
-                       if (part >= hweight8((priv->r001540 >> 16) & 0xff))
-                               return ~0;
-                       return addr;
-               }
-               mmio += 3;
-       }
-
-       return addr;
-}
-
-struct nouveau_oclass *
-nva3_devinit_oclass = &(struct nouveau_devinit_impl) {
-       .base.handle = NV_SUBDEV(DEVINIT, 0xa3),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nv50_devinit_ctor,
-               .dtor = _nouveau_devinit_dtor,
-               .init = nv50_devinit_init,
-               .fini = _nouveau_devinit_fini,
-       },
-       .pll_set = nva3_devinit_pll_set,
-       .disable = nva3_devinit_disable,
-       .mmio    = nva3_devinit_mmio,
-       .post = nvbios_init,
-}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nvaf.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nvaf.c
deleted file mode 100644 (file)
index f70b954..0000000
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * Copyright 2013 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include "nv50.h"
-
-static u64
-nvaf_devinit_disable(struct nouveau_devinit *devinit)
-{
-       struct nv50_devinit_priv *priv = (void *)devinit;
-       u32 r001540 = nv_rd32(priv, 0x001540);
-       u32 r00154c = nv_rd32(priv, 0x00154c);
-       u64 disable = 0;
-
-       if (!(r001540 & 0x40000000)) {
-               disable |= (1ULL << NVDEV_ENGINE_MSPDEC);
-               disable |= (1ULL << NVDEV_ENGINE_MSPPP);
-       }
-
-       if (!(r00154c & 0x00000004))
-               disable |= (1ULL << NVDEV_ENGINE_DISP);
-       if (!(r00154c & 0x00000020))
-               disable |= (1ULL << NVDEV_ENGINE_MSVLD);
-       if (!(r00154c & 0x00000040))
-               disable |= (1ULL << NVDEV_ENGINE_VIC);
-       if (!(r00154c & 0x00000200))
-               disable |= (1ULL << NVDEV_ENGINE_CE0);
-
-       return disable;
-}
-
-struct nouveau_oclass *
-nvaf_devinit_oclass = &(struct nouveau_devinit_impl) {
-       .base.handle = NV_SUBDEV(DEVINIT, 0xaf),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nv50_devinit_ctor,
-               .dtor = _nouveau_devinit_dtor,
-               .init = nv50_devinit_init,
-               .fini = _nouveau_devinit_fini,
-       },
-       .pll_set = nva3_devinit_pll_set,
-       .disable = nvaf_devinit_disable,
-       .post = nvbios_init,
-}.base;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nvc0.c
deleted file mode 100644 (file)
index 672aaf3..0000000
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- * Copyright 2013 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include "nv50.h"
-
-int
-nvc0_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq)
-{
-       struct nv50_devinit_priv *priv = (void *)devinit;
-       struct nouveau_bios *bios = nouveau_bios(priv);
-       struct nvbios_pll info;
-       int N, fN, M, P;
-       int ret;
-
-       ret = nvbios_pll_parse(bios, type, &info);
-       if (ret)
-               return ret;
-
-       ret = nva3_pll_calc(nv_subdev(devinit), &info, freq, &N, &fN, &M, &P);
-       if (ret < 0)
-               return ret;
-
-       switch (info.type) {
-       case PLL_VPLL0:
-       case PLL_VPLL1:
-       case PLL_VPLL2:
-       case PLL_VPLL3:
-               nv_mask(priv, info.reg + 0x0c, 0x00000000, 0x00000100);
-               nv_wr32(priv, info.reg + 0x04, (P << 16) | (N << 8) | M);
-               nv_wr32(priv, info.reg + 0x10, fN << 16);
-               break;
-       default:
-               nv_warn(priv, "0x%08x/%dKhz unimplemented\n", type, freq);
-               ret = -EINVAL;
-               break;
-       }
-
-       return ret;
-}
-
-static u64
-nvc0_devinit_disable(struct nouveau_devinit *devinit)
-{
-       struct nv50_devinit_priv *priv = (void *)devinit;
-       u32 r022500 = nv_rd32(priv, 0x022500);
-       u64 disable = 0ULL;
-
-       if (r022500 & 0x00000001)
-               disable |= (1ULL << NVDEV_ENGINE_DISP);
-
-       if (r022500 & 0x00000002) {
-               disable |= (1ULL << NVDEV_ENGINE_MSPDEC);
-               disable |= (1ULL << NVDEV_ENGINE_MSPPP);
-       }
-
-       if (r022500 & 0x00000004)
-               disable |= (1ULL << NVDEV_ENGINE_MSVLD);
-       if (r022500 & 0x00000008)
-               disable |= (1ULL << NVDEV_ENGINE_MSENC);
-       if (r022500 & 0x00000100)
-               disable |= (1ULL << NVDEV_ENGINE_CE0);
-       if (r022500 & 0x00000200)
-               disable |= (1ULL << NVDEV_ENGINE_CE1);
-
-       return disable;
-}
-
-static int
-nvc0_devinit_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-                 struct nouveau_oclass *oclass, void *data, u32 size,
-                 struct nouveau_object **pobject)
-{
-       struct nv50_devinit_priv *priv;
-       int ret;
-
-       ret = nouveau_devinit_create(parent, engine, oclass, &priv);
-       *pobject = nv_object(priv);
-       if (ret)
-               return ret;
-
-       if (nv_rd32(priv, 0x022500) & 0x00000001)
-               priv->base.post = true;
-       return 0;
-}
-
-struct nouveau_oclass *
-nvc0_devinit_oclass = &(struct nouveau_devinit_impl) {
-       .base.handle = NV_SUBDEV(DEVINIT, 0xc0),
-       .base.ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = nvc0_devinit_ctor,
-               .dtor = _nouveau_devinit_dtor,
-               .init = nv50_devinit_init,
-               .fini = _nouveau_devinit_fini,
-       },
-       .pll_set = nvc0_devinit_pll_set,
-       .disable = nvc0_devinit_disable,
-       .post = nvbios_init,
-}.base;
index 7a768afba813d0d6c029343c0aef1cfb9b835bd4..bb51a95d80122c51677196f51a258a07715e8be5 100644 (file)
@@ -1,40 +1,34 @@
 #ifndef __NVKM_DEVINIT_PRIV_H__
 #define __NVKM_DEVINIT_PRIV_H__
-
-#include <subdev/bios.h>
-#include <subdev/bios/pll.h>
-#include <subdev/bios/init.h>
-#include <subdev/clk/pll.h>
 #include <subdev/devinit.h>
 
-struct nouveau_devinit_impl {
-       struct nouveau_oclass base;
-       void (*meminit)(struct nouveau_devinit *);
-       int  (*pll_set)(struct nouveau_devinit *, u32 type, u32 freq);
-       u64  (*disable)(struct nouveau_devinit *);
-       u32  (*mmio)(struct nouveau_devinit *, u32);
-       int  (*post)(struct nouveau_subdev *, bool);
+struct nvkm_devinit_impl {
+       struct nvkm_oclass base;
+       void (*meminit)(struct nvkm_devinit *);
+       int  (*pll_set)(struct nvkm_devinit *, u32 type, u32 freq);
+       u64  (*disable)(struct nvkm_devinit *);
+       u32  (*mmio)(struct nvkm_devinit *, u32);
+       int  (*post)(struct nvkm_subdev *, bool);
 };
 
-#define nouveau_devinit_create(p,e,o,d)                                        \
-       nouveau_devinit_create_((p), (e), (o), sizeof(**d), (void **)d)
-#define nouveau_devinit_destroy(p) ({                                          \
-       struct nouveau_devinit *d = (p);                                       \
-       _nouveau_devinit_dtor(nv_object(d));                                   \
+#define nvkm_devinit_create(p,e,o,d)                                        \
+       nvkm_devinit_create_((p), (e), (o), sizeof(**d), (void **)d)
+#define nvkm_devinit_destroy(p) ({                                          \
+       struct nvkm_devinit *d = (p);                                       \
+       _nvkm_devinit_dtor(nv_object(d));                                   \
 })
-#define nouveau_devinit_init(p) ({                                             \
-       struct nouveau_devinit *d = (p);                                       \
-       _nouveau_devinit_init(nv_object(d));                                   \
+#define nvkm_devinit_init(p) ({                                             \
+       struct nvkm_devinit *d = (p);                                       \
+       _nvkm_devinit_init(nv_object(d));                                   \
 })
-#define nouveau_devinit_fini(p,s) ({                                           \
-       struct nouveau_devinit *d = (p);                                       \
-       _nouveau_devinit_fini(nv_object(d), (s));                              \
+#define nvkm_devinit_fini(p,s) ({                                           \
+       struct nvkm_devinit *d = (p);                                       \
+       _nvkm_devinit_fini(nv_object(d), (s));                              \
 })
 
-int nouveau_devinit_create_(struct nouveau_object *, struct nouveau_object *,
-                           struct nouveau_oclass *, int, void **);
-void _nouveau_devinit_dtor(struct nouveau_object *);
-int _nouveau_devinit_init(struct nouveau_object *);
-int _nouveau_devinit_fini(struct nouveau_object *, bool suspend);
-
+int nvkm_devinit_create_(struct nvkm_object *, struct nvkm_object *,
+                           struct nvkm_oclass *, int, void **);
+void _nvkm_devinit_dtor(struct nvkm_object *);
+int _nvkm_devinit_init(struct nvkm_object *);
+int _nvkm_devinit_fini(struct nvkm_object *, bool suspend);
 #endif