SDIsel processes llvm.dbg.declare by recording the variable debug information descrip...

Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46659 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/CodeGen/AsmPrinter.h b/include/llvm/CodeGen/AsmPrinter.h
index cda213cbb99b97e47a60842cd7c43fd9b4820a96..bbe650b0c2f407b68ce0024640f43176cb2519ce 100644 (file)
--- a/include/llvm/CodeGen/AsmPrinter.h
+++ b/include/llvm/CodeGen/AsmPrinter.h
@@ -281,6 +281,10 @@ namespace llvm {
     void printLabel(const MachineInstr *MI) const;
     void printLabel(unsigned Id) const;
 
+    /// printDeclare - This method prints a local variable declaration used by
+    /// debug tables.
+    void printDeclare(const MachineInstr *MI) const;
+
   protected:
     /// EmitZeros - Emit a block of zeros.
     ///

diff --git a/include/llvm/CodeGen/MachineModuleInfo.h b/include/llvm/CodeGen/MachineModuleInfo.h
index ee94e51a2baff3272bba00dcb6798d7eb87fea52..8d0a34b1f3f34ca89ce7dd0542009e2bbe5eb643 100644 (file)
--- a/include/llvm/CodeGen/MachineModuleInfo.h
+++ b/include/llvm/CodeGen/MachineModuleInfo.h
@@ -844,6 +844,10 @@ public:
   /// serialization of a DebugInfoDesc.
   bool Verify(Value *V);
   bool Verify(GlobalVariable *GV);
+
+  /// isVerified - Return true if the specified GV has already been
+  /// verified as a debug information descriptor.
+  bool isVerified(GlobalVariable *GV);
 };
 
 //===----------------------------------------------------------------------===//
@@ -1073,7 +1077,11 @@ public:
   
   /// Verify - Verify that a Value is debug information descriptor.
   ///
-  bool Verify(Value *V);
+  bool Verify(Value *V) { return VR.Verify(V); }
+
+  /// isVerified - Return true if the specified GV has already been
+  /// verified as a debug information descriptor.
+  bool isVerified(GlobalVariable *GV) { return VR.isVerified(GV); }
   
   /// AnalyzeModule - Scan the module for global debug information.
   ///
@@ -1197,7 +1205,7 @@ public:
 
   /// RecordVariable - Indicate the declaration of  a local variable.
   ///
-  void RecordVariable(Value *V, unsigned FrameIndex);
+  void RecordVariable(GlobalValue *GV, unsigned FrameIndex);
   
   /// getRootScope - Return current functions root scope.
   ///

diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h
index a9ad9a452d4507b745195feee5c2c07f921768cc..c1a01ea7441d8cd110848043d40538cc1c23f801 100644 (file)
--- a/include/llvm/CodeGen/SelectionDAG.h
+++ b/include/llvm/CodeGen/SelectionDAG.h
@@ -551,6 +551,10 @@ public:
   /// implement the ComputeNumSignBitsForTarget method in the TargetLowering
   /// class to allow target nodes to be understood.
   unsigned ComputeNumSignBits(SDOperand Op, unsigned Depth = 0) const;
+
+  /// isVerifiedDebugInfoDesc - Returns true if the specified SDOperand has
+  /// been verified as a debug information descriptor.
+  bool isVerifiedDebugInfoDesc(SDOperand Op) const;
   
 private:
   void RemoveNodeFromCSEMaps(SDNode *N);

diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h
index d0011c3347f4e3b7a7fef8fd71e4996be5f2ff61..fb8db3e2219cd220366e8f51b16e93c5994dbdd4 100644 (file)
--- a/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -498,6 +498,12 @@ namespace ISD {
     //   Operand #2 : 0 indicates a debug label (e.g. stoppoint), 1 indicates
     //                a EH label, 2 indicates unknown label type.
     LABEL,
+
+    // DECLARE - Represents a llvm.dbg.declare intrinsic. It's used to track
+    // local variable declarations for debugging information. First operand is
+    // a chain, while the next two operands are first two arguments (address
+    // and variable) of a llvm.dbg.declare instruction.
+    DECLARE,
     
     // STACKSAVE - STACKSAVE has one operand, an input chain.  It produces a
     // value, the same type as the pointer type for the system, and an output

diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index e62104c921195bcae592c3133852320419fd1d70..e18b3665f69b708f5c012856b73d9ca22970793f 100644 (file)
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -47,8 +47,9 @@ public:
     PHI = 0,
     INLINEASM = 1,
     LABEL = 2,
-    EXTRACT_SUBREG = 3,
-    INSERT_SUBREG = 4
+    DECLARE = 3,
+    EXTRACT_SUBREG = 4,
+    INSERT_SUBREG = 5
   };
 
   unsigned getNumOpcodes() const { return NumOpcodes; }

diff --git a/lib/CodeGen/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter.cpp
index 2acf287988bd19359458a1bb5f92450c92eceddd..eac574386b62aed61a70044586c221e0f716a543 100644 (file)
--- a/lib/CodeGen/AsmPrinter.cpp
+++ b/lib/CodeGen/AsmPrinter.cpp
@@ -1289,6 +1289,12 @@ void AsmPrinter::printLabel(unsigned Id) const {
   O << "\n" << TAI->getPrivateGlobalPrefix() << "label" << Id << ":\n";
 }
 
+/// printDeclare - This method prints a local variable declaration used by
+/// debug tables.
+void AsmPrinter::printDeclare(const MachineInstr *MI) const {
+  O << "\n";
+}
+
 /// PrintAsmOperand - Print the specified operand of MI, an INLINEASM
 /// instruction, using the specified assembler variant.  Targets should
 /// overried this to format as appropriate.

diff --git a/lib/CodeGen/MachineModuleInfo.cpp b/lib/CodeGen/MachineModuleInfo.cpp
index 5edeefbfaec357fd5ef3ba6eb79c791156af0f0c..6d285bde049ba7b5ac547fe87fcfba96899c447f 100644 (file)
--- a/lib/CodeGen/MachineModuleInfo.cpp
+++ b/lib/CodeGen/MachineModuleInfo.cpp
@@ -1471,6 +1471,14 @@ bool DIVerifier::Verify(GlobalVariable *GV) {
   return true;
 }
 
+/// isVerified - Return true if the specified GV has already been
+/// verified as a debug information descriptor.
+bool DIVerifier::isVerified(GlobalVariable *GV) {
+  unsigned &ValiditySlot = Validity[GV];
+  if (ValiditySlot) return ValiditySlot == Valid;
+  return false;
+}
+
 //===----------------------------------------------------------------------===//
 
 DebugScope::~DebugScope() {
@@ -1554,12 +1562,6 @@ DebugInfoDesc *MachineModuleInfo::getDescFor(Value *V) {
   return DR.Deserialize(V);
 }
 
-/// Verify - Verify that a Value is debug information descriptor.
-///
-bool MachineModuleInfo::Verify(Value *V) {
-  return VR.Verify(V);
-}
-
 /// AnalyzeModule - Scan the module for global debug information.
 ///
 void MachineModuleInfo::AnalyzeModule(Module &M) {
@@ -1657,8 +1659,8 @@ unsigned MachineModuleInfo::RecordRegionEnd(Value *V) {
 
 /// RecordVariable - Indicate the declaration of  a local variable.
 ///
-void MachineModuleInfo::RecordVariable(Value *V, unsigned FrameIndex) {
-  VariableDesc *VD = cast<VariableDesc>(DR.Deserialize(V));
+void MachineModuleInfo::RecordVariable(GlobalValue *GV, unsigned FrameIndex) {
+  VariableDesc *VD = cast<VariableDesc>(DR.Deserialize(GV));
   DebugScope *Scope = getOrCreateScope(VD->getContext());
   DebugVariable *DV = new DebugVariable(VD, FrameIndex);
   Scope->AddVariable(DV);

diff --git a/lib/CodeGen/PrologEpilogInserter.cpp b/lib/CodeGen/PrologEpilogInserter.cpp
index 41efbef54e2e4171abac246a3e3030caa0c9b0fe..f30d7d455d72a30cfa1f53dc3fed18f597641143 100644 (file)
--- a/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/lib/CodeGen/PrologEpilogInserter.cpp
@@ -513,9 +513,9 @@ void PEI::replaceFrameIndices(MachineFunction &Fn) {
     for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
       MachineInstr *MI = I;
 
-      // Remember how much SP has been adjustment to create the call frame.
       if (I->getOpcode() == FrameSetupOpcode ||
           I->getOpcode() == FrameDestroyOpcode) {
+        // Remember how much SP has been adjustment to create the call frame.
         int Size = I->getOperand(0).getImm();
         if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) ||
             (StackGrowsDown && I->getOpcode() == FrameDestroyOpcode))
@@ -526,7 +526,10 @@ void PEI::replaceFrameIndices(MachineFunction &Fn) {
         // Visit the instructions created by eliminateCallFramePseudoInstr().
         I = next(PrevI);
         MI = NULL;
-      } else {
+      } else if (I->getOpcode() == TargetInstrInfo::DECLARE)
+        // Ignore it.
+        I++;
+      else {
         I++;
         for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
           if (MI->getOperand(i).isFrameIndex()) {

diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index fc726e4c41ad1274ee1238e3a47e06d00b3f5891..4749b763448cc6dd693b5b551c77be616829d286 100644 (file)
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -1085,6 +1085,19 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
       break;
     }
     break;
+
+  case ISD::DECLARE:
+    assert(Node->getNumOperands() == 3 && "Invalid DECLARE node!");
+    switch (TLI.getOperationAction(ISD::DECLARE, MVT::Other)) {
+    default: assert(0 && "This action is not supported yet!");
+    case TargetLowering::Legal:
+      Tmp1 = LegalizeOp(Node->getOperand(0));  // Legalize the chain.
+      Tmp2 = LegalizeOp(Node->getOperand(1));  // Legalize the address.
+      Tmp3 = LegalizeOp(Node->getOperand(2));  // Legalize the variable.
+      Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3);
+      break;
+    }
+    break;    
     
   case ISD::DEBUG_LOC:
     assert(Node->getNumOperands() == 4 && "Invalid DEBUG_LOC node!");

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index 3ecd623c8135d206c0f695f9c2d3c712d4c806a0..a165b17dffba90c30afc3aa2e34522c50be60dfb 100644 (file)
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -736,6 +736,7 @@ void ScheduleDAG::EmitNode(SDNode *Node, unsigned InstanceNo,
     case ISD::EntryToken: // fall thru
     case ISD::TokenFactor:
     case ISD::LABEL:
+    case ISD::DECLARE:
       break;
     case ISD::CopyToReg: {
       unsigned InReg;

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 6f0e98d8258953b397fc7b79bdf36eb0806a29e4..afb46476aa0704c4c31f54b53bf8aad1ce5925c0 100644 (file)
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -20,6 +20,7 @@
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineConstantPool.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Target/MRegisterInfo.h"
 #include "llvm/Target/TargetData.h"
@@ -1620,6 +1621,16 @@ unsigned SelectionDAG::ComputeNumSignBits(SDOperand Op, unsigned Depth) const{
 }
 
 
+bool SelectionDAG::isVerifiedDebugInfoDesc(SDOperand Op) const {
+  GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
+  if (!GA) return false;
+  GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
+  if (!GV) return false;
+  MachineModuleInfo *MMI = getMachineModuleInfo();
+  return MMI && MMI->hasDebugInfo() && MMI->isVerified(GV);
+}
+
+
 /// getNode - Gets or creates the specified node.
 ///
 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) {
@@ -3700,6 +3711,7 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {
   case ISD::MERGE_VALUES:  return "merge_values";
   case ISD::INLINEASM:     return "inlineasm";
   case ISD::LABEL:         return "label";
+  case ISD::DECLARE:       return "declare";
   case ISD::HANDLENODE:    return "handlenode";
   case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
   case ISD::CALL:          return "call";

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 2d883878ce5ec349eb38e4034213722f1196a762..55231f34a1bf13ac95e0eab918e489de80a34c88 100644 (file)
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -2663,12 +2663,10 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
   case Intrinsic::dbg_declare: {
     MachineModuleInfo *MMI = DAG.getMachineModuleInfo();
     DbgDeclareInst &DI = cast<DbgDeclareInst>(I);
-    if (MMI && DI.getVariable() && MMI->Verify(DI.getVariable())) {
-      SDOperand AddressOp  = getValue(DI.getAddress());
-      if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(AddressOp))
-        MMI->RecordVariable(DI.getVariable(), FI->getIndex());
-    }
-
+    Value *Variable = DI.getVariable();
+    if (MMI && Variable && MMI->Verify(Variable))
+      DAG.setRoot(DAG.getNode(ISD::DECLARE, MVT::Other, getRoot(),
+                              getValue(DI.getAddress()), getValue(Variable)));
     return 0;
   }
     

diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index ff299006a6103fac2e010b0ffd3678efc25a0ed9..56bbce7328bfa19917702cf43b01f91f8eb888e3 100644 (file)
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -23,6 +23,7 @@
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/Target/TargetLowering.h"

diff --git a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
index 0490f88bb4aa81841410ccb279732de959195147..2962891ec2641658061ef145c5a2e39aaabd32c6 100644 (file)
--- a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
+++ b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
@@ -18,6 +18,7 @@
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/CodeGen/SelectionDAGISel.h"

diff --git a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
index 8bde66300a190e7f424ef0e0fddea470f094d114..488c4e526b48698f0630fa5795697ed1e948b28b 100644 (file)
--- a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
+++ b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
@@ -20,6 +20,7 @@
 #include "llvm/CodeGen/MachineConstantPool.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/Target/TargetOptions.h"

diff --git a/lib/Target/IA64/IA64ISelDAGToDAG.cpp b/lib/Target/IA64/IA64ISelDAGToDAG.cpp
index 338733a8c449c3aa31b0b2c3fe95d0ab8cc35ab5..d8e308acb7afc24e8db9140c75d5e217a4bf2633 100644 (file)
--- a/lib/Target/IA64/IA64ISelDAGToDAG.cpp
+++ b/lib/Target/IA64/IA64ISelDAGToDAG.cpp
@@ -18,6 +18,7 @@
 #include "IA64ISelLowering.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/Target/TargetOptions.h"

diff --git a/lib/Target/Mips/MipsISelDAGToDAG.cpp b/lib/Target/Mips/MipsISelDAGToDAG.cpp
index b2ad66670bb1e74ef54766f7fce8dfa94cb82273..88e66fc9a22d287e62077fb8474d56979aed8524 100644 (file)
--- a/lib/Target/Mips/MipsISelDAGToDAG.cpp
+++ b/lib/Target/Mips/MipsISelDAGToDAG.cpp
@@ -27,6 +27,7 @@
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/Target/TargetMachine.h"

diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 09fef25196489f29ec7a05f0652004011d527c21..222792142e8a38781af9e85857c421438777b279 100644 (file)
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -20,6 +20,7 @@
 #include "PPCHazardRecognizers.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/CodeGen/SelectionDAGISel.h"

diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index f8dfbe3efaabd9459fd79662aa1b5f1adf3ceab4..0d7f40bb2e5db1e100b7fb9e2e26cf722fbd6e43 100644 (file)
--- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -19,6 +19,7 @@
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/CodeGen/SelectionDAGISel.h"

diff --git a/lib/Target/Target.td b/lib/Target/Target.td
index 4b1ab2850c0a5fb32ca2461c6ac174631fb850af..a2669dca4aefb5166d093df4ec77aef2c75a3141 100644 (file)
--- a/lib/Target/Target.td
+++ b/lib/Target/Target.td
@@ -339,8 +339,15 @@ def LABEL : Instruction {
   let Namespace = "TargetInstrInfo";
   let hasCtrlDep = 1;
 }
+def DECLARE : Instruction {
+  let OutOperandList = (ops);
+  let InOperandList = (ops variable_ops);
+  let AsmString = "";
+  let Namespace = "TargetInstrInfo";
+  let hasCtrlDep = 1;
+}
 def EXTRACT_SUBREG : Instruction {
-        let OutOperandList = (ops variable_ops);
+  let OutOperandList = (ops variable_ops);
   let InOperandList = (ops variable_ops);
   let AsmString = "";
   let Namespace = "TargetInstrInfo";

diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index c51cd80cb9f52e2c9f8c39111eed1aed0d272540..5fc6c5eada1e0cd7ca3f3760351c240d3368c307 100644 (file)
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -29,6 +29,7 @@
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/Target/TargetMachine.h"

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index b19456e1fdffede601cd985d9a596f0424a368f4..1093ea86121dfe5bfdd72b901e301d2fa4069c38 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -30,6 +30,7 @@
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/Support/MathExtras.h"
@@ -279,7 +280,7 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
   setOperationAction(ISD::MEMSET          , MVT::Other, Custom);
   setOperationAction(ISD::MEMCPY          , MVT::Other, Custom);
 
-  // Use the default ISD::LOCATION expansion.
+  // Use the default ISD::LOCATION, ISD::DECLARE expansion.
   setOperationAction(ISD::LOCATION, MVT::Other, Expand);
   // FIXME - use subtarget debug flags
   if (!Subtarget->isTargetDarwin() &&
@@ -3769,6 +3770,9 @@ SDOperand
 X86TargetLowering::LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG) {
   GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
   SDOperand Result = DAG.getTargetGlobalAddress(GV, getPointerTy());
+  // If it's a debug information descriptor, don't mess with it.
+  if (DAG.isVerifiedDebugInfoDesc(Op))
+    return Result;
   Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), Result);
   // With PIC, the address is actually $g + Offset.
   if (getTargetMachine().getRelocationModel() == Reloc::PIC_ &&

diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index e3d806ade2bc7d560cb041704606486cb1688fcb..eac7bd63267cf80bed18c27df3ba16adf6ae5819 100644 (file)
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -625,6 +625,9 @@ void AsmWriterEmitter::run(std::ostream &O) {
     << "  } else if (MI->getOpcode() == TargetInstrInfo::LABEL) {\n"
     << "    printLabel(MI);\n"
     << "    return true;\n"
+    << "  } else if (MI->getOpcode() == TargetInstrInfo::DECLARE) {\n"
+    << "    printDeclare(MI);\n"
+    << "    return true;\n"
     << "  }\n\n";
   
   O << "  // Emit the opcode for the instruction.\n"

diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp
index ddf8eeb84aaf6a4d486240b00273b8bac5c6ac52..60d196cb4aa086d3bafb983d49c939c9f08fd57a 100644 (file)
--- a/utils/TableGen/CodeEmitterGen.cpp
+++ b/utils/TableGen/CodeEmitterGen.cpp
@@ -27,6 +27,7 @@ void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) {
     if (R->getName() == "PHI" ||
         R->getName() == "INLINEASM" ||
         R->getName() == "LABEL" ||
+        R->getName() == "DECLARE" ||
         R->getName() == "EXTRACT_SUBREG" ||
         R->getName() == "INSERT_SUBREG") continue;
     
@@ -100,6 +101,7 @@ void CodeEmitterGen::run(std::ostream &o) {
     if (R->getName() == "PHI" ||
         R->getName() == "INLINEASM" ||
         R->getName() == "LABEL" ||
+        R->getName() == "DECLARE" ||
         R->getName() == "EXTRACT_SUBREG" ||
         R->getName() == "INSERT_SUBREG") {
       o << "    0U";
@@ -132,6 +134,7 @@ void CodeEmitterGen::run(std::ostream &o) {
     if (InstName == "PHI" ||
         InstName == "INLINEASM" ||
         InstName == "LABEL"||
+        InstName == "DECLARE"||
         InstName == "EXTRACT_SUBREG" ||
         InstName == "INSERT_SUBREG") continue;
     

diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index bc758b75cdd13c5d7d0d9fc28d24ad0645dbcb8e..b9730a5bd90690eff8d54966665dd25893750ea0 100644 (file)
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -290,6 +290,10 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
   if (I == Instructions.end()) throw "Could not find 'LABEL' instruction!";
   const CodeGenInstruction *LABEL = &I->second;
   
+  I = getInstructions().find("DECLARE");
+  if (I == Instructions.end()) throw "Could not find 'DECLARE' instruction!";
+  const CodeGenInstruction *DECLARE = &I->second;
+  
   I = getInstructions().find("EXTRACT_SUBREG");
   if (I == Instructions.end()) 
     throw "Could not find 'EXTRACT_SUBREG' instruction!";
@@ -304,12 +308,14 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
   NumberedInstructions.push_back(PHI);
   NumberedInstructions.push_back(INLINEASM);
   NumberedInstructions.push_back(LABEL);
+  NumberedInstructions.push_back(DECLARE);
   NumberedInstructions.push_back(EXTRACT_SUBREG);
   NumberedInstructions.push_back(INSERT_SUBREG);
   for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
     if (&II->second != PHI &&
         &II->second != INLINEASM &&
         &II->second != LABEL &&
+        &II->second != DECLARE &&
         &II->second != EXTRACT_SUBREG &&
         &II->second != INSERT_SUBREG)
       NumberedInstructions.push_back(&II->second);

diff --git a/utils/TableGen/DAGISelEmitter.cpp b/utils/TableGen/DAGISelEmitter.cpp
index ae62c9fcb2239fb5db60788e4015d0e96c7a7ed1..493330a689f9195c9d1ebcbfbe934f1794f39fcb 100644 (file)
--- a/utils/TableGen/DAGISelEmitter.cpp
+++ b/utils/TableGen/DAGISelEmitter.cpp
@@ -1779,6 +1779,30 @@ void DAGISelEmitter::EmitInstructionSelector(std::ostream &OS) {
      << "                               MVT::Other, Ops, 3);\n"
      << "}\n\n";
 
+  OS << "SDNode *Select_DECLARE(const SDOperand &N) {\n"
+     << "  MachineModuleInfo *MMI = CurDAG->getMachineModuleInfo();\n"
+     << "  SDOperand Chain = N.getOperand(0);\n"
+     << "  SDOperand N1 = N.getOperand(1);\n"
+     << "  SDOperand N2 = N.getOperand(2);\n"
+     << "  if (!isa<FrameIndexSDNode>(N1) || !isa<GlobalAddressSDNode>(N2)) {\n"
+     << "    cerr << \"Cannot yet select llvm.dbg.declare: \";\n"
+     << "    N.Val->dump(CurDAG);\n"
+     << "    abort();\n"
+     << "  }\n"
+     << "  int FI = cast<FrameIndexSDNode>(N1)->getIndex();\n"
+     << "  GlobalValue *GV = cast<GlobalAddressSDNode>(N2)->getGlobal();\n"
+     << "  // FIXME. Handle variable declarations later since it lives on.\n"
+     << "  MMI->RecordVariable(GV, FI);\n"
+     << "  SDOperand Tmp1 = "
+     << "CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy());\n"
+     << "  SDOperand Tmp2 = "
+     << "CurDAG->getTargetGlobalAddress(GV, TLI.getPointerTy());\n"
+     << "  AddToISelQueue(Chain);\n"
+     << "  SDOperand Ops[] = { Tmp1, Tmp2, Chain };\n"
+     << "  return CurDAG->getTargetNode(TargetInstrInfo::DECLARE,\n"
+     << "                               MVT::Other, Ops, 3);\n"
+     << "}\n\n";
+
   OS << "SDNode *Select_EXTRACT_SUBREG(const SDOperand &N) {\n"
      << "  SDOperand N0 = N.getOperand(0);\n"
      << "  SDOperand N1 = N.getOperand(1);\n"
@@ -1846,6 +1870,7 @@ void DAGISelEmitter::EmitInstructionSelector(std::ostream &OS) {
      << "  }\n"
      << "  case ISD::INLINEASM: return Select_INLINEASM(N);\n"
      << "  case ISD::LABEL: return Select_LABEL(N);\n"
+     << "  case ISD::DECLARE: return Select_DECLARE(N);\n"
      << "  case ISD::EXTRACT_SUBREG: return Select_EXTRACT_SUBREG(N);\n"
      << "  case ISD::INSERT_SUBREG:  return Select_INSERT_SUBREG(N);\n";
 

diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index 5bf25d17451c10eb832f2c9de767afae5ec79a85..3be36266f7082b1f8dd5aac5e4675495ddf1870b 100644 (file)
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -409,6 +409,7 @@ void InstrInfoEmitter::emitShiftedValue(Record *R, StringInit *Val,
     if (R->getName() != "PHI" &&
         R->getName() != "INLINEASM" &&
         R->getName() != "LABEL" &&
+        R->getName() != "DECLARE" &&
         R->getName() != "EXTRACT_SUBREG" &&
         R->getName() != "INSERT_SUBREG")
       throw R->getName() + " doesn't have a field named '" +