ARM: tegra: clock: Save and restore audio clock during suspend
authorColin Cross <ccross@android.com>
Tue, 11 Jan 2011 20:15:01 +0000 (12:15 -0800)
committerColin Cross <ccross@android.com>
Tue, 11 Jan 2011 20:15:44 +0000 (12:15 -0800)
Change-Id: Id1c7a6c8e8679995ad462f17309c2f3550c00da1
Signed-off-by: Colin Cross <ccross@android.com>
arch/arm/mach-tegra/tegra2_clocks.c

index 3f2eccc2fa923c371ace15d9cfc9829fff43864c..b59e9c381f8546d1247107f82a2bcd0a34a0c5ff 100644 (file)
@@ -2134,7 +2134,7 @@ void __init tegra2_init_clocks(void)
 
 #ifdef CONFIG_PM
 static u32 clk_rst_suspend[RST_DEVICES_NUM + CLK_OUT_ENB_NUM +
-                          PERIPH_CLK_SOURCE_NUM + 21];
+                          PERIPH_CLK_SOURCE_NUM + 22];
 
 void tegra_clk_suspend(void)
 {
@@ -2164,6 +2164,8 @@ void tegra_clk_suspend(void)
        *ctx++ = clk_readl(tegra_clk_sclk.reg + SUPER_CLK_DIVIDER);
        *ctx++ = clk_readl(tegra_clk_pclk.reg);
 
+       *ctx++ = clk_readl(tegra_clk_audio.reg);
+
        for (off = PERIPH_CLK_SOURCE_I2S1; off <= PERIPH_CLK_SOURCE_OSC;
                        off += 4) {
                if (off == PERIPH_CLK_SOURCE_EMC)
@@ -2218,6 +2220,8 @@ void tegra_clk_resume(void)
        clk_writel(*ctx++, tegra_clk_sclk.reg + SUPER_CLK_DIVIDER);
        clk_writel(*ctx++, tegra_clk_pclk.reg);
 
+       clk_writel(*ctx++, tegra_clk_audio.reg);
+
        /* enable all clocks before configuring clock sources */
        clk_writel(0xbffffff9ul, CLK_OUT_ENB);
        clk_writel(0xfefffff7ul, CLK_OUT_ENB + 4);