Minor cleanup related to my latest scheduler changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122545 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h
index 69aec43920493fc4184238a3155ac33727ac29fa..b3d05c700ac0f17f14a2353f5b4b7203bdb96559 100644 (file)
--- a/include/llvm/CodeGen/ScheduleDAG.h
+++ b/include/llvm/CodeGen/ScheduleDAG.h
@@ -328,7 +328,7 @@ namespace llvm {
 
     /// isInstr - Return true if this SUnit refers to a machine instruction as
     /// opposed to an SDNode.
-    bool isInstr() const { return !Node; }
+    bool isInstr() const { return Instr; }
 
     /// setInstr - Assign the instruction for the SUnit.
     /// This may be used during post-regalloc scheduling.

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index d6368047bcd1966d33a982d8acdfb4a5b71d69e4..a51595f1b06385cf37ac641dff805d4bf3720b83 100644 (file)
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -348,7 +348,10 @@ void ScheduleDAGRRList::ReleasePredecessors(SUnit *SU) {
 /// Check to see if any of the pending instructions are ready to issue.  If
 /// so, add them to the available queue.
 void ScheduleDAGRRList::ReleasePending() {
-  assert(!EnableSchedCycles && "requires --enable-sched-cycles" );
+  if (!EnableSchedCycles) {
+    assert(PendingQueue.empty() && "pending instrs not allowed in this mode");
+    return;
+  }
 
   // If the available queue is empty, it is safe to reset MinAvailableCycle.
   if (AvailableQueue->empty())
@@ -634,8 +637,7 @@ void ScheduleDAGRRList::BacktrackBottomUp(SUnit *SU, SUnit *BtSU) {
 
   RestoreHazardCheckerBottomUp();
 
-  if (EnableSchedCycles)
-    ReleasePending();
+  ReleasePending();
 
   ++NumBacktracks;
 }