int emmc_clk_power_save_en;\r
char *pdmaBuf;\r
void (*nand_timing_config)(unsigned long AHBnKHz);\r
+ void (*rknand_suspend)(void);\r
+ void (*rknand_resume)(void);\r
int reserved[20];\r
};\r
\r
//#include "api_flash.h"\r
#include "rknand_base.h"\r
#include <linux/clk.h>\r
+#include <linux/cpufreq.h>\r
\r
#define DRIVER_NAME "rk29xxnand"\r
\r
-const char rknand_base_version[] = "rknand_base.c version: 4.34 20120401";\r
+const char rknand_base_version[] = "rknand_base.c version: 4.38 20120717";\r
#define NAND_DEBUG_LEVEL0 0\r
#define NAND_DEBUG_LEVEL1 1\r
#define NAND_DEBUG_LEVEL2 2\r
static char *ptrac_buf = grknand_trac_buf;\r
void trac_log(long lba,int len, int mod)\r
{\r
+ unsigned long long t;\r
+ unsigned long nanosec_rem;\r
+ t = cpu_clock(UINT_MAX);\r
+ nanosec_rem = do_div(t, 1000000000);\r
if(mod)\r
- ptrac_buf += sprintf(ptrac_buf,"W %d %d \n",lba,len);\r
+ ptrac_buf += sprintf(ptrac_buf,"[%5lu.%06lu] W %d %d \n",(unsigned long) t, nanosec_rem / 1000,lba,len);\r
else\r
- ptrac_buf += sprintf(ptrac_buf,"R %d %d \n",lba,len);\r
+ ptrac_buf += sprintf(ptrac_buf,"[%5lu.%06lu] R %d %d \n",(unsigned long) t, nanosec_rem / 1000,lba,len);\r
+}\r
+\r
+void trac_logs(char *s)\r
+{\r
+ unsigned long long t;\r
+ unsigned long nanosec_rem;\r
+ t = cpu_clock(UINT_MAX);\r
+ nanosec_rem = do_div(t, 1000000000);\r
+ ptrac_buf += sprintf(ptrac_buf,"[%5lu.%06lu] %s\n",(unsigned long) t, nanosec_rem / 1000,s);\r
}\r
\r
static int rkNand_trac_read(char *page, char **start, off_t off, int count, int *eof,\r
int len;\r
\r
len = ptrac_buf - grknand_trac_buf - off;\r
- printk("rkNand_trac_read: page=%x,off=%x,count=%x ,len=%x \n",(int)page,(int)off,count,len);\r
+ //printk("rkNand_trac_read: page=%x,off=%x,count=%x ,len=%x \n",(int)page,(int)off,count,len);\r
\r
if (len < 0)\r
len = 0;\r
if(gpNandInfo->nand_timing_config)\r
{\r
nandc_clk_rate = newclk;\r
- gpNandInfo->nand_timing_config( nandc_clk_rate / 1000); // KHz\r
+ //gpNandInfo->nand_timing_config( nandc_clk_rate / 1000); // KHz\r
}\r
}\r
return 0;\r
static int rknand_suspend(struct platform_device *pdev, pm_message_t state)\r
{\r
gpNandInfo->rknand.rknand_schedule_enable = 0;\r
+ if(gpNandInfo->rknand_suspend)\r
+ gpNandInfo->rknand_suspend(); \r
NAND_DEBUG(NAND_DEBUG_LEVEL0,"rknand_suspend: \n");\r
return 0;\r
}\r
\r
static int rknand_resume(struct platform_device *pdev)\r
{\r
+ if(gpNandInfo->rknand_resume)\r
+ gpNandInfo->rknand_resume(); \r
gpNandInfo->rknand.rknand_schedule_enable = 1;\r
NAND_DEBUG(NAND_DEBUG_LEVEL0,"rknand_resume: \n");\r
return 0;\r
int capacitytmp;
int usb_status;
int usb_old_satus;
- int gBatCapacityChargeCnt;
+ int gBatCapacityChargeCnt;
+ int suspend_capacity;
+ int resume_status;
};
static BLOCKING_NOTIFIER_HEAD(notifier_list);
{
- int i = 0;
- int capacity = 0;
- int BatVoltage;
-
- struct batt_vol_cal *p;
- p = batt_table;
-
- BatVoltage = di ->voltage_mV;
+ int i = 0;
+ int capacity = 0;
+ int BatVoltage;
- if (di->charge_status == POWER_SUPPLY_STATUS_CHARGING){ //charge
- if(BatVoltage >= (p[BATT_NUM - 1].charge_vol)){
- capacity = 100;
- }
- else{
- if(BatVoltage <= (p[0].charge_vol)){
- capacity = 0;
- }
- else{
- for(i = 0; i < BATT_NUM - 1; i++){
+ struct batt_vol_cal *p;
+ p = batt_table;
- if(((p[i].charge_vol) <= BatVoltage) && (BatVoltage < (p[i+1].charge_vol))){
- // capacity = p[i].disp_cal ;
+ BatVoltage = di ->voltage_mV;
+
+ if (di->charge_status == POWER_SUPPLY_STATUS_CHARGING){ //charge
+ if(BatVoltage >= (p[BATT_NUM - 1].charge_vol)){
+ capacity = 100;
+ }
+ else{
+ if(BatVoltage <= (p[0].charge_vol)){
+ capacity = 0;
+ }
+ else{
+ for(i = 0; i < BATT_NUM - 1; i++){
+
+ if(((p[i].charge_vol) <= BatVoltage) && (BatVoltage < (p[i+1].charge_vol))){
+ // capacity = p[i].disp_cal ;
capacity = i * 10 + ((BatVoltage - p[i].charge_vol) * 10) / (p[i+1] .charge_vol- p[i].charge_vol);
- break;
- }
- }
- }
- }
-
- }
- else{ //discharge
- if(BatVoltage >= (p[BATT_NUM - 1].dis_charge_vol)){
- capacity = 100;
- }
- else{
- if(BatVoltage <= (p[0].dis_charge_vol)){
- capacity = 0;
- }
- else{
- for(i = 0; i < BATT_NUM - 1; i++){
- if(((p[i].dis_charge_vol) <= BatVoltage) && (BatVoltage < (p[i+1].dis_charge_vol))){
- // capacity = p[i].disp_cal ;
+ break;
+ }
+ }
+ }
+ }
+
+ }
+ else{ //discharge
+ if(BatVoltage >= (p[BATT_NUM - 1].dis_charge_vol)){
+ capacity = 100;
+ }
+ else{
+ if(BatVoltage <= (p[0].dis_charge_vol)){
+ capacity = 0;
+ }
+ else{
+ for(i = 0; i < BATT_NUM - 1; i++){
+ if(((p[i].dis_charge_vol) <= BatVoltage) && (BatVoltage < (p[i+1].dis_charge_vol))){
+ // capacity = p[i].disp_cal ;
capacity = i * 10 + ((BatVoltage - p[i].dis_charge_vol) * 10) / (p[i+1] .dis_charge_vol- p[i].dis_charge_vol);
- break;
- }
- }
- }
+ break;
+ }
+ }
+ }
- }
+ }
- }
+ }
- return capacity;
+ return capacity;
}
-void twl6030_batt_capacity_samples(struct twl6030_bci_device_info *di)
+static void twl6030_batt_capacity_samples(struct twl6030_bci_device_info *di)
{
int capacity = 0;
capacity = twl6030_batt_vol_to_capacity (di);
- twl6030battery_current(di);
- //printk("old-capactiyt == %d, now-capacity == %d , di->charge_status == %d,di->current_uA = %d\n", di->capacity, capacity, di->charge_status,di->current_uA);
-///////////////////////////////////////////////////////////////////////////////////////////////////////
-
+ twl6030battery_current(di);
-// capacity = twl6030_batt_vol_to_capacity (di);
+ if( 1 == di->resume_status ){
+ di->resume_status = 0;
+ if (di->charge_status == POWER_SUPPLY_STATUS_CHARGING){\
+ if (di->suspend_capacity > capacity){
+
+ di->capacity = di->suspend_capacity;
+ }else{
+ di->capacity = capacity;
+ }
+ }else{
+ if (di->suspend_capacity > capacity){
+ di->capacity = capacity;
+ }else{
+ di->capacity = di->suspend_capacity;
+ }
+
+ }
+ return;
+
+ }
if (di->charge_status == POWER_SUPPLY_STATUS_FULL){
if (capacity < di->capacity){
#ifdef CONFIG_PM
static int twl6030_bci_battery_suspend(struct device *dev)
{
-// struct platform_device *pdev = to_platform_device(dev);
-// struct twl6030_bci_device_info *di = platform_get_drvdata(pdev);
+ struct platform_device *pdev = to_platform_device(dev);
+ struct twl6030_bci_device_info *di = platform_get_drvdata(pdev);
long int events;
u8 rd_reg = 0;
int ret;
if (ret)
goto err;
- //cancel_delayed_work(&di->work);
- //cancel_delayed_work(&di->twl6030_bci_monitor_work);
+ //cancel_delayed_work(&di->work);
+ cancel_delayed_work(&di->twl6030_bci_monitor_work);
//cancel_delayed_work(&di->twl6030_current_avg_work);
+ di->suspend_capacity = di->capacity;
+
/* We cannot tolarate a sleep longer than 30 seconds
* while on ac charging we have to reset the BQ watchdog timer.
*/
static int twl6030_bci_battery_resume(struct device *dev)
{
-// struct platform_device *pdev = to_platform_device(dev);
-// struct twl6030_bci_device_info *di = platform_get_drvdata(pdev);
+ struct platform_device *pdev = to_platform_device(dev);
+ struct twl6030_bci_device_info *di = platform_get_drvdata(pdev);
long int events;
u8 rd_reg = 0;
int ret;
+ di->resume_status =1;
ret = twl6030battery_temp_setup(true);
if (ret) {
pr_err("%s: Temp measurement setup failed (%d)!\n",
if (ret)
goto err;
- //queue_delayed_work(di->freezable_work, &di->twl6030_bci_monitor_work, 0);
+ queue_delayed_work(di->freezable_work, &di->twl6030_bci_monitor_work, 0);
//queue_delayed_work(di->freezable_work, &di->twl6030_current_avg_work, 50);
//queue_delayed_work(di->freezable_work, &di->work, di->interval);
dwc_otg_device->core_if->usb_mode = USB_MODE_FORCE_HOST;
#else
dwc_otg_device->core_if->usb_mode = USB_MODE_NORMAL;
+#ifdef CONFIG_DWC_OTG_DEFAULT_DEVICE
+ dwc_otg_device->core_if->usb_mode = USB_MODE_FORCE_DEVICE;
+#endif
#endif
#endif
*/
#ifdef CONFIG_ARCH_RK29
unsigned int * otg_phy_con1 = (unsigned int*)(USB_GRF_CON);
-#endif
-#ifdef CONFIG_ARCH_RK30
- unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC1_CON2);
-#endif
-
otgreg = * otg_phy_con1;
otgreg |= (0x01<<13); // software control
otgreg |= (0x01<<14); // exit suspend.
otgreg &= ~(0x01<<13); // software control
*otg_phy_con1 = otgreg;
+#endif
+#ifdef CONFIG_ARCH_RK30
+ unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC1_CON2);
+ *otg_phy_con1 = ((0x01<<2)<<16); // exit suspend.
+#endif
+
#if 0
*otg_phy_con1 |= (0x01<<2);
*otg_phy_con1 |= (0x01<<3); // exit suspend.
}
#ifdef CONFIG_ARCH_RK30
+ dwc_otg_hcd->host_setenable = 1;
dwc_otg_hcd->connect_detect_timer.function = dwc_otg_hcd_connect_detect;
dwc_otg_hcd->connect_detect_timer.data = (unsigned long)(dwc_otg_hcd);
init_timer( &dwc_otg_hcd->connect_detect_timer);
dwc_otg_msc_unlock(_pcd);
}
/* every 500 ms open usb phy power and start 1 jiffies timer to get vbus */
- if( _pcd->phy_suspend == 0 )
+ else if( _pcd->phy_suspend == 0 )
/* no vbus detect here , close usb phy */
dwc_otg20phy_suspend( 0 );
}
{
SPIN_UNLOCK(&_pcd->lock);
ret = _pcd->driver->setup(&_pcd->gadget, _ctrl);
- if(spin_is_locked(&_pcd->lock)){
+ if(spin_is_locked(&_pcd->lock))
DWC_PRINT("%s warning: pcd->lock locked without unlock\n", __func__);
- SPIN_UNLOCK(&_pcd->lock);
- }
SPIN_LOCK(&_pcd->lock);
if (ret < 0)
{
#define FSG_NUM_BUFFERS 2
/* Default size of buffer length. */
-#define FSG_BUFLEN ((u32)65536)
+#define FSG_BUFLEN ((u32)16384)
/* Maximal number of LUNs supported in mass storage function */
#define FSG_MAX_LUNS 8
par2->y_offset = par->y_offset;
//memcpy(info2->screen_base+par2->y_offset,info->screen_base+par->y_offset,
// var->xres*var->yres*var->bits_per_pixel>>3);
+ #if !defined(CONFIG_THREE_FB_BUFFER)
fb_copy_by_ipp(info2,info,par->y_offset);
+ #endif
dev_drv1->pan_display(dev_drv1,layer_id);
//queue_delayed_work(inf->workqueue, &inf->delay_work,0);
}
cblen = crlen = (xvir*yvir);
break;
default:
- printk("un supported format:0x%x\n",data_format);
+ printk("%s:un supported format:0x%x\n",__func__,data_format);
return -EINVAL;
}
#else
par2->yact = par->yact;
par2->format = par->format;
info2->var.nonstd &= 0xffffff00;
- info2->var.nonstd |= par->format;
+ info2->var.nonstd |= data_format;
dev_drv1->set_par(dev_drv1,layer_id);
}
}
struct resource *res;
struct resource *mem;
int ret = 0;
+ struct rk_fb_inf *fb_inf = platform_get_drvdata(g_fb_pdev);
switch(fb_id)
{
case 0:
#endif
break;
case 2:
+ #if !defined(CONFIG_THREE_FB_BUFFER)
res = platform_get_resource_byname(g_fb_pdev, IORESOURCE_MEM, "fb2 buf");
if (res == NULL)
{
mem = request_mem_region(res->start, resource_size(res), g_fb_pdev->name);
fbi->screen_base = ioremap(res->start, fbi->fix.smem_len);
memset(fbi->screen_base, 0, fbi->fix.smem_len);
+ #else //three buffer no need to copy
+ fbi->fix.smem_start = fb_inf->fb[0]->fix.smem_start;
+ fbi->fix.smem_len = fb_inf->fb[0]->fix.smem_len;
+ fbi->screen_base = fb_inf->fb[0]->screen_base;
+ #endif
printk("fb%d:phy:%lx>>vir:%p>>len:0x%x\n",fb_id,
fbi->fix.smem_start,fbi->screen_base,fbi->fix.smem_len);
break;
{RT3261_PRIV_DATA , 0x6115},
{RT3261_PRIV_INDEX , 0x0023},//PR23 = 0804'h
{RT3261_PRIV_DATA , 0x0804},
- {RT3261_SPK_VOL , 0x8b8b},//SPKMIX -> SPKVOL
- {RT3261_HP_VOL , 0x8888},
+ {RT3261_SPK_VOL , 0x8b8b},//SPKMIX -> SPKVOL
+ {RT3261_HP_VOL , 0x8888},
+ {RT3261_OUTPUT , 0x8888},//unmute OUTVOLL/R
+
};
#define RT3261_INIT_REG_LEN ARRAY_SIZE(init_list)
static int rt3261_write(struct snd_soc_codec *codec, unsigned int reg,
unsigned int value)
{
- struct rt3261_priv *rt3261 = snd_soc_codec_get_drvdata(codec);
u8 data[3];
data[0] = reg;
static const struct snd_kcontrol_new rt3261_out_l_mix[] = {
SOC_DAPM_SINGLE("SPK MIXL Switch", RT3261_OUT_L3_MIXER,
RT3261_M_SM_L_OM_L_SFT, 1, 1),
+ SOC_DAPM_SINGLE("BST3 Switch", RT3261_OUT_L3_MIXER,
+ RT3261_M_BST2_OM_L_SFT, 1, 1),
SOC_DAPM_SINGLE("BST1 Switch", RT3261_OUT_L3_MIXER,
RT3261_M_BST1_OM_L_SFT, 1, 1),
SOC_DAPM_SINGLE("INL Switch", RT3261_OUT_L3_MIXER,
static const struct snd_kcontrol_new rt3261_out_r_mix[] = {
SOC_DAPM_SINGLE("SPK MIXR Switch", RT3261_OUT_R3_MIXER,
RT3261_M_SM_L_OM_R_SFT, 1, 1),
+ SOC_DAPM_SINGLE("BST3 Switch", RT3261_OUT_R3_MIXER,
+ RT3261_M_BST2_OM_R_SFT, 1, 1),
SOC_DAPM_SINGLE("BST2 Switch", RT3261_OUT_R3_MIXER,
RT3261_M_BST4_OM_R_SFT, 1, 1),
SOC_DAPM_SINGLE("BST1 Switch", RT3261_OUT_R3_MIXER,
{"SPK MIXR", "DAC R2 Switch", "DAC R2"},
{"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
- {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
+ {"OUT MIXL", "BST3 Switch", "BST3"},
{"OUT MIXL", "BST1 Switch", "BST1"},
{"OUT MIXL", "INL Switch", "INL VOL"},
{"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
{"OUT MIXL", "DAC L2 Switch", "DAC L2"},
{"OUT MIXL", "DAC L1 Switch", "DAC L1"},
- {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
+ {"OUT MIXR", "BST3 Switch", "BST3"},
{"OUT MIXR", "BST2 Switch", "BST2"},
{"OUT MIXR", "BST1 Switch", "BST1"},
{"OUT MIXR", "INR Switch", "INR VOL"},
#include "rt5623.h"
+#define RT5623_PROC
+#ifdef RT5623_PROC
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/vmalloc.h>
+#endif
+
static struct i2c_client *i2c_client;
static int codec_write(struct i2c_client *client, unsigned int reg,
unsigned int value)
{
u8 data[3];
- int ret;
data[0] = reg;
data[1] = (value >> 8) & 0xff;
xfer[0].flags = 0;
xfer[0].len = 1;
xfer[0].buf = ®
+ xfer[0].scl_rate = 100 * 1000;
/* Read data */
xfer[1].addr = client->addr;
xfer[1].flags = I2C_M_RD;
xfer[1].len = 2;
xfer[1].buf = (u8 *)&data;
+ xfer[1].scl_rate = 100 * 1000;
ret = i2c_transfer(client->adapter, xfer, 2);
if (ret != 2) {
};
static struct rt5623_reg init_data[] = {
- {RT5623_PWR_MANAG_ADD3 , 0x8000},
- {RT5623_PWR_MANAG_ADD2 , 0x2000},
- {RT5623_LINE_IN_VOL , 0xe808},
- {RT5623_STEREO_DAC_VOL , 0x6808},
- {RT5623_OUTPUT_MIXER_CTRL , 0x1400},
- {RT5623_ADC_REC_GAIN , 0xf58b},
- {RT5623_ADC_REC_MIXER , 0x6f6f},
- {RT5623_AUDIO_INTERFACE , 0x8000},
+ {RT5623_PWR_MANAG_ADD3 , 0x8000},
+ {RT5623_PWR_MANAG_ADD2 , 0x2000},
+ {RT5623_LINE_IN_VOL , 0xe808},
+ {RT5623_STEREO_DAC_VOL , 0x6808},
+ {RT5623_OUTPUT_MIXER_CTRL , 0x1400},
+ {RT5623_ADC_REC_GAIN , 0xf58b},
+ {RT5623_ADC_REC_MIXER , 0x6f6f},
+ {RT5623_AUDIO_INTERFACE , 0x8083},
{RT5623_STEREO_AD_DA_CLK_CTRL , 0x0a2d},
- {RT5623_PWR_MANAG_ADD1 , 0x8000},
- {RT5623_PWR_MANAG_ADD2 , 0x27f3},
- {RT5623_PWR_MANAG_ADD3 , 0x9c00},
- {RT5623_SPK_OUT_VOL , 0x0000},
+ {RT5623_PWR_MANAG_ADD1 , 0x8000},
+ {RT5623_PWR_MANAG_ADD2 , 0xb7f3},
+ {RT5623_PWR_MANAG_ADD3 , 0x90c0},
+ {RT5623_SPK_OUT_VOL , 0x0000},
+ {RT5623_PLL_CTRL , 0x481f},
+ {RT5623_GLOBAL_CLK_CTRL_REG , 0x8000},
+ {RT5623_STEREO_AD_DA_CLK_CTRL , 0x3a2d},
};
#define RT5623_INIT_REG_NUM ARRAY_SIZE(init_data)
};
MODULE_DEVICE_TABLE(i2c, rt5623_i2c_id);
+static int rt5623_proc_init(void);
+
static int __devinit rt5623_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
pr_info("%s(%d)\n", __func__, __LINE__);
+ #ifdef RT5623_PROC
+ rt5623_proc_init();
+ #endif
+
i2c_client = i2c;
rt5623_reset(i2c);
{
return i2c_add_driver(&rt5623_i2c_driver);
}
-module_init(rt5623_modinit);
+late_initcall(rt5623_modinit);
static void __exit rt5623_modexit(void)
{
MODULE_DESCRIPTION("ASoC RT5623 driver");
MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
MODULE_LICENSE("GPL");
+
+
+#ifdef RT5623_PROC
+
+static ssize_t rt5623_proc_write(struct file *file, const char __user *buffer,
+ unsigned long len, void *data)
+{
+ char *cookie_pot;
+ char *p;
+ int reg;
+ int value;
+
+ cookie_pot = (char *)vmalloc( len );
+ if (!cookie_pot)
+ {
+ return -ENOMEM;
+ }
+ else
+ {
+ if (copy_from_user( cookie_pot, buffer, len ))
+ return -EFAULT;
+ }
+
+ switch(cookie_pot[0])
+ {
+ case 'r':
+ case 'R':
+ printk("Read reg debug\n");
+ if(cookie_pot[1] ==':')
+ {
+ strsep(&cookie_pot,":");
+ while((p=strsep(&cookie_pot,",")))
+ {
+ reg = simple_strtol(p,NULL,16);
+ value = codec_read(i2c_client,reg);
+ printk("codec_read:0x%04x = 0x%04x\n",reg,value);
+ }
+ printk("\n");
+ }
+ else
+ {
+ printk("Error Read reg debug.\n");
+ printk("For example: echo r:22,23,24,25>rt5623_ts\n");
+ }
+ break;
+ case 'w':
+ case 'W':
+ printk("Write reg debug\n");
+ if(cookie_pot[1] ==':')
+ {
+ strsep(&cookie_pot,":");
+ while((p=strsep(&cookie_pot,"=")))
+ {
+ reg = simple_strtol(p,NULL,16);
+ p=strsep(&cookie_pot,",");
+ value = simple_strtol(p,NULL,16);
+ codec_write(i2c_client,reg,value);
+ printk("codec_write:0x%04x = 0x%04x\n",reg,value);
+ }
+ printk("\n");
+ }
+ else
+ {
+ printk("Error Write reg debug.\n");
+ printk("For example: w:22=0,23=0,24=0,25=0>rt5623_ts\n");
+ }
+ break;
+ case 'a':
+ printk("Dump reg \n");
+
+ for(reg = 0; reg < 0x6e; reg+=2)
+ {
+ value = codec_read(i2c_client,reg);
+ printk("codec_read:0x%04x = 0x%04x\n",reg,value);
+ }
+
+ break;
+ default:
+ printk("Help for rt5623_ts .\n-->The Cmd list: \n");
+ printk("-->'d&&D' Open or Off the debug\n");
+ printk("-->'r&&R' Read reg debug,Example: echo 'r:22,23,24,25'>rt5623_ts\n");
+ printk("-->'w&&W' Write reg debug,Example: echo 'w:22=0,23=0,24=0,25=0'>rt5623_ts\n");
+ break;
+ }
+
+ return len;
+}
+
+static const struct file_operations rt5623_proc_fops = {
+ .owner = THIS_MODULE,
+};
+
+static int rt5623_proc_init(void)
+{
+ struct proc_dir_entry *rt5623_proc_entry;
+ rt5623_proc_entry = create_proc_entry("driver/rt5623_ts", 0777, NULL);
+ if(rt5623_proc_entry != NULL)
+ {
+ rt5623_proc_entry->write_proc = rt5623_proc_write;
+ return 0;
+ }
+ else
+ {
+ printk("create proc error !\n");
+ return -1;
+ }
+}
+#endif
+
+
+
+
+
projects / firefly-linux-kernel-4.4.55.git / commitdiff