Properly compose subregister indices when coalescing.

The comment about ordering of subreg indices is no longer true.
This exposed a bug in the new substVirtReg method that is also fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105294 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index ce0c5e6a87c3cd2ebe1e5b830cd4794ce862d67b..402178dc6d6708d664e4da144c903c244a34ca36 100644 (file)
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -117,7 +117,8 @@ void MachineOperand::substVirtReg(unsigned Reg, unsigned SubIdx,
   if (SubIdx && getSubReg())
     SubIdx = TRI.composeSubRegIndices(SubIdx, getSubReg());
   setReg(Reg);
-  setSubReg(SubIdx);
+  if (SubIdx)
+    setSubReg(SubIdx);
 }
 
 void MachineOperand::substPhysReg(unsigned Reg, const TargetRegisterInfo &TRI) {

diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp
index ed3c243ff3e41c362b34441e14698f034f71c3ab..7c1bc47fa9a470a2a183935564bc0434a7fa9b30 100644 (file)
--- a/lib/CodeGen/SimpleRegisterCoalescing.cpp
+++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp
@@ -848,19 +848,7 @@ SimpleRegisterCoalescing::UpdateRegDefsUses(unsigned SrcReg, unsigned DstReg,
       continue;
     }
 
-    // Sub-register indexes goes from small to large. e.g.
-    // RAX: 1 -> AL, 2 -> AX, 3 -> EAX
-    // EAX: 1 -> AL, 2 -> AX
-    // So RAX's sub-register 2 is AX, RAX's sub-regsiter 3 is EAX, whose
-    // sub-register 2 is also AX.
-    //
-    // FIXME: Properly compose subreg indices for all targets.
-    //
-    if (SubIdx && OldSubIdx && SubIdx != OldSubIdx)
-      ;
-    else if (SubIdx)
-      O.setSubReg(SubIdx);
-    O.setReg(DstReg);
+    O.substVirtReg(DstReg, SubIdx, *tri_);
 
     DEBUG({
         dbgs() << "\t\tupdated: ";