ARM: shmobile: silk: initial device tree
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Tue, 28 Jul 2015 22:14:59 +0000 (01:14 +0300)
committerSimon Horman <horms+renesas@verge.net.au>
Thu, 30 Jul 2015 00:05:15 +0000 (09:05 +0900)
Add the initial device  tree for the R8A7794 SoC based SILK low cost board.
SCIF2 serial port support is included, so that the serial console can work.

Based on the original patch by Vladimir Barinov
<vladimir.barinov@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/r8a7794-silk.dts [new file with mode: 0644]

index 679d7cc2f57c4981f96142976e154b9d60539342..c6e0befabada4ecff73f5eee2fd7aee53d0d9f5d 100644 (file)
@@ -518,6 +518,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
        r8a7791-koelsch.dtb \
        r8a7793-gose.dtb \
        r8a7794-alt.dtb \
+       r8a7794-silk.dtb \
        sh73a0-kzm9g.dtb
 dtb-$(CONFIG_ARCH_SOCFPGA) += \
        socfpga_arria5_socdk.dtb \
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
new file mode 100644 (file)
index 0000000..f3da95b
--- /dev/null
@@ -0,0 +1,51 @@
+/*
+ * Device Tree Source for the SILK board
+ *
+ * Copyright (C) 2014 Renesas Electronics Corporation
+ * Copyright (C) 2014-2015 Renesas Solutions Corp.
+ * Copyright (C) 2014-2015 Cogent Embedded, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include "r8a7794.dtsi"
+
+/ {
+       model = "SILK";
+       compatible = "renesas,silk", "renesas,r8a7794";
+
+       aliases {
+               serial0 = &scif2;
+       };
+
+       chosen {
+               bootargs = "ignore_loglevel";
+               stdout-path = &scif2;
+       };
+
+       memory@40000000 {
+               device_type = "memory";
+               reg = <0 0x40000000 0 0x40000000>;
+       };
+};
+
+&extal_clk {
+       clock-frequency = <20000000>;
+};
+
+&pfc {
+       scif2_pins: serial2 {
+               renesas,groups = "scif2_data";
+               renesas,function = "scif2";
+       };
+};
+
+&scif2 {
+       pinctrl-0 = <&scif2_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};