rockchip: iommu: replace prefix iommu with rockchip for iommu compatible
authorxxm <xxm@rock-chips.com>
Thu, 14 Aug 2014 07:01:37 +0000 (15:01 +0800)
committerxxm <xxm@rock-chips.com>
Thu, 14 Aug 2014 07:02:47 +0000 (15:02 +0800)
arch/arm/boot/dts/rk3036.dtsi
arch/arm/boot/dts/rk312x.dtsi

index 82c2229248faf2f0070b250e137bf1c102ba3016..9593c4e1d151ef9eaeb3d9aa7e4a420f5be57084 100755 (executable)
 
        vop_mmu {
                dbgname = "vop";
-               compatible = "iommu,vop_mmu";
+               compatible = "rockchip,vop_mmu";
                reg = <0x10118300 0x100>;
                interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "vop_mmu";
 
        hevc_mmu {
                dbgname = "hevc";
-               compatible = "iommu,hevc_mmu";
+               compatible = "rockchip,hevc_mmu";
                reg = <0x1010c440 0x100>,
                      <0x1010c480 0x100>;
                interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 
        vpu_mmu {
                dbgname = "vpu";
-               compatible = "iommu,vpu_mmu";
+               compatible = "rockchip,vpu_mmu";
                reg = <0x10108800 0x100>;
                interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "vpu_mmu";
index 826b5ad9ffe172aac1fa86d43799576df7735117..6a7696fd227e35be97f48a3620e3a1779c403845 100755 (executable)
 
   vop_mmu {
                dbgname = "vop";
-               compatible = "iommu,vop_mmu";
+               compatible = "rockchip,vop_mmu";
                reg = <0x1010e300 0x100>;
                interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "vop_mmu";
 
          hevc_mmu {
                dbgname = "hevc";
-               compatible = "iommu,hevc_mmu";
+               compatible = "rockchip,hevc_mmu";
                reg = <0x10104440 0x100>,
                      <0x10104480 0x100>;
                interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 
          vpu_mmu {
                dbgname = "vpu";
-               compatible = "iommu,vpu_mmu";
+               compatible = "rockchip,vpu_mmu";
                reg = <0x10104800 0x100>;
                interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "vpu_mmu";
 
          iep_mmu {
                dbgname = "iep";
-               compatible = "iommu,iep_mmu";
+               compatible = "rockchip,iep_mmu";
                reg = <0x10108800 0x100>;
                interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "iep_mmu";