Use pcmpeq to generate vector of all ones.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27167 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index dd8ed73cb36e7092f0c29609aef8ab1eeeb5a595..ae955fad11e99ff77f8d5911ce48e553a7cc6707 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -2364,6 +2364,10 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
     abort();
   }
   case ISD::BUILD_VECTOR: {
+    // All one's are handled with pcmpeqd.
+    if (ISD::isBuildVectorAllOnes(Op.Val))
+      return Op;
+
     std::set<SDOperand> Values;
     SDOperand Elt0 = Op.getOperand(0);
     Values.insert(Elt0);

diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index 1a28c8ffa2e9566e9032da051ce421259f7b749f..b7f4b20bd7787de1ea43cded818e8a9c28cd8e6b 100644 (file)
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -1008,6 +1008,10 @@ def V_SET0_PD : PDI<0x57, MRMInitReg, (ops VR128:$dst),
                     "xorpd $dst, $dst",
                     [(set VR128:$dst, (v2f64 immAllZerosV))]>;
 
+def V_SETALLONES : PDI<0x76, MRMInitReg, (ops VR128:$dst),
+                       "pcmpeqd $dst, $dst",
+                       [(set VR128:$dst, (v2f64 immAllOnesV))]>;
+
 // Scalar to 128-bit vector with zero extension.
 // Three operand (but two address) aliases.
 let isTwoAddress = 1 in {
@@ -1051,6 +1055,13 @@ def : Pat<(v16i8 immAllZerosV), (v16i8 (V_SET0_PI))>, Requires<[HasSSE2]>;
 def : Pat<(v8i16 immAllZerosV), (v8i16 (V_SET0_PI))>, Requires<[HasSSE2]>;
 def : Pat<(v4i32 immAllZerosV), (v4i32 (V_SET0_PI))>, Requires<[HasSSE2]>;
 
+// 128-bit vector all one's.
+def : Pat<(v16i8 immAllOnesV), (v16i8 (V_SETALLONES))>, Requires<[HasSSE2]>;
+def : Pat<(v8i16 immAllOnesV), (v8i16 (V_SETALLONES))>, Requires<[HasSSE2]>;
+def : Pat<(v4i32 immAllOnesV), (v4i32 (V_SETALLONES))>, Requires<[HasSSE2]>;
+def : Pat<(v2i64 immAllOnesV), (v2i64 (V_SETALLONES))>, Requires<[HasSSE2]>;
+def : Pat<(v4f32 immAllOnesV), (v4f32 (V_SETALLONES))>, Requires<[HasSSE1]>;
+
 // Load 128-bit integer vector values.
 def : Pat<(v16i8 (load addr:$src)), (MOVDQArm addr:$src)>,
       Requires<[HasSSE2]>;