return 0;
}
+static int tegra_sflash_prepare_transfer(struct spi_master *spi)
+{
+ struct tegra_sflash_data *tsd = spi_master_get_devdata(spi);
+ int ret;
+
+ ret = pm_runtime_get_sync(tsd->dev);
+ if (ret < 0) {
+ dev_err(tsd->dev, "runtime PM get failed: %d\n", ret);
+ return ret;
+ }
+
+ return ret;
+}
+
static int tegra_sflash_transfer_one_message(struct spi_master *master,
struct spi_message *msg)
{
struct spi_device *spi = msg->spi;
int ret;
- ret = pm_runtime_get_sync(tsd->dev);
- if (ret < 0) {
- dev_err(tsd->dev, "pm_runtime_get() failed, err = %d\n", ret);
- return ret;
- }
-
msg->status = 0;
msg->actual_length = 0;
single_xfer = list_is_singular(&msg->transfers);
tegra_sflash_writel(tsd, tsd->def_command_reg, SPI_COMMAND);
msg->status = ret;
spi_finalize_current_message(master);
- pm_runtime_put(tsd->dev);
return ret;
}
+static int tegra_sflash_unprepare_transfer(struct spi_master *spi)
+{
+ struct tegra_sflash_data *tsd = spi_master_get_devdata(spi);
+
+ pm_runtime_put(tsd->dev);
+
+ return 0;
+}
+
static irqreturn_t handle_cpu_based_xfer(struct tegra_sflash_data *tsd)
{
struct spi_transfer *t = tsd->curr_xfer;
/* the spi->mode bits understood by this driver: */
master->mode_bits = SPI_CPOL | SPI_CPHA;
master->setup = tegra_sflash_setup;
+ master->prepare_transfer_hardware = tegra_sflash_prepare_transfer;
master->transfer_one_message = tegra_sflash_transfer_one_message;
+ master->unprepare_transfer_hardware = tegra_sflash_unprepare_transfer;
master->num_chipselect = MAX_CHIP_SELECT;
master->bus_num = -1;