Fix va_arg to generate LDDFi for floating point values, instead of LDXi.

All non-FP cases use LDXi as before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7765 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/SparcV9/SparcV9InstrSelection.cpp b/lib/Target/SparcV9/SparcV9InstrSelection.cpp
index 2bc9f8358687743266503722a1377156398db2a9..970c5fdcf0ad446a3f4e2acc99332b32c724c36c 100644 (file)
--- a/lib/Target/SparcV9/SparcV9InstrSelection.cpp
+++ b/lib/Target/SparcV9/SparcV9InstrSelection.cpp
@@ -2807,13 +2807,15 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
       case 64: // reg:   Phi(reg,reg)
         break;                          // don't forward the value
 
-      case 65: // reg:   VaArg(reg)
+      case 65: // reg:   VaArg(reg): the va_arg instruction
       {
         // Use value initialized by va_start as pointer to args on the stack.
         // Load argument via current pointer value, then increment pointer.
         int argSize = target.getFrameInfo().getSizeOfEachArgOnStack();
         Instruction* vaArgI = subtreeRoot->getInstruction();
-        mvec.push_back(BuildMI(V9::LDXi, 3).addReg(vaArgI->getOperand(0)).
+        MachineOpCode loadOp = vaArgI->getType()->isFloatingPoint()? V9::LDDFi
+                                                                   : V9::LDXi;
+        mvec.push_back(BuildMI(loadOp, 3).addReg(vaArgI->getOperand(0)).
                        addSImm(0).addRegDef(vaArgI));
         mvec.push_back(BuildMI(V9::ADDi, 3).addReg(vaArgI->getOperand(0)).
                        addSImm(argSize).addRegDef(vaArgI->getOperand(0)));